]> Pileus Git - ~andy/linux/commitdiff
[SCSI] qla2xxx: Add NVRAM 'Disable Serdes' bit support.
authorAndrew Vasquez <andrew.vasquez@qlogic.com>
Fri, 23 Jun 2006 23:10:39 +0000 (16:10 -0700)
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>
Mon, 26 Jun 2006 21:21:55 +0000 (16:21 -0500)
The host section of ISP24xx NVRAMs contain a new bit which
allows a user to selectively disable ports of an HBA.  These
ports (hosts) will not be presented to the midlayer.

Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
drivers/scsi/qla2xxx/qla_def.h
drivers/scsi/qla2xxx/qla_fw.h
drivers/scsi/qla2xxx/qla_init.c

index 653e22e490a1e6adc53b5862d2a0f0f12acd975c..dfcd3a2dd7c17d63760002c087516c3ac1620df1 100644 (file)
@@ -2044,6 +2044,7 @@ typedef struct scsi_qla_host {
                uint32_t        enable_led_scheme       :1;
                uint32_t        msi_enabled             :1;
                uint32_t        msix_enabled            :1;
+               uint32_t        disable_serdes          :1;
        } flags;
 
        atomic_t        loop_state;
index 3af478663be7f2755d05fc689debccddf3788f91..af023f51fe7677a4f87e9f5ad7f37eba34eeec34 100644 (file)
@@ -141,7 +141,7 @@ struct nvram_24xx {
         * BIT 2  = Enable Memory Map BIOS
         * BIT 3  = Enable Selectable Boot
         * BIT 4  = Disable RISC code load
-        * BIT 5  =
+        * BIT 5  = Disable Serdes
         * BIT 6  =
         * BIT 7  =
         *
index 880de6f380e96d1d3bd2c9bba24520abf6e1c7a7..2ccdd848bcf62e55c39ff67bad0266f2e132880a 100644 (file)
@@ -89,6 +89,17 @@ qla2x00_initialize_adapter(scsi_qla_host_t *ha)
 
        ha->isp_ops.nvram_config(ha);
 
+       if (ha->flags.disable_serdes) {
+               /* Mask HBA via NVRAM settings? */
+               qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
+                   "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
+                   ha->port_name[0], ha->port_name[1],
+                   ha->port_name[2], ha->port_name[3],
+                   ha->port_name[4], ha->port_name[5],
+                   ha->port_name[6], ha->port_name[7]);
+               return QLA_FUNCTION_FAILED;
+       }
+
        qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
 
        retry = 10;
@@ -1639,6 +1650,7 @@ qla2x00_nvram_config(scsi_qla_host_t *ha)
        ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
        ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
        ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
+       ha->flags.disable_serdes = 0;
 
        ha->operating_mode =
            (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
@@ -3450,6 +3462,7 @@ qla24xx_nvram_config(scsi_qla_host_t *ha)
        ha->flags.enable_lip_full_login = 1;
        ha->flags.enable_target_reset = 1;
        ha->flags.enable_led_scheme = 0;
+       ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
 
        ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
            (BIT_6 | BIT_5 | BIT_4)) >> 4;