]> Pileus Git - ~andy/linux/commitdiff
arm/tegra: prepare early init for multiple tegra variants
authorPeter De Schrijver <pdeschrijver@nvidia.com>
Wed, 14 Dec 2011 15:03:17 +0000 (17:03 +0200)
committerOlof Johansson <olof@lixom.net>
Sun, 18 Dec 2011 04:15:13 +0000 (20:15 -0800)
This patch splits the early init code in a common and a tegra20 specific part.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/mach-tegra/board-dt.c
arch/arm/mach-tegra/board-harmony.c
arch/arm/mach-tegra/board-paz00.c
arch/arm/mach-tegra/board-seaboard.c
arch/arm/mach-tegra/board-trimslice.c
arch/arm/mach-tegra/board.h
arch/arm/mach-tegra/common.c

index c21863d6425da47b720d965a9a93a165deceaa3e..ddaa037be02815cfc71b1cb78ffe86b94c3d8109 100644 (file)
@@ -53,17 +53,6 @@ void seaboard_pinmux_init(void);
 void trimslice_pinmux_init(void);
 void ventana_pinmux_init(void);
 
-static const struct of_device_id tegra_dt_irq_match[] __initconst = {
-       { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
-       { }
-};
-
-void __init tegra_dt_init_irq(void)
-{
-       tegra_init_irq();
-       of_irq_init(tegra_dt_irq_match);
-}
-
 struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
@@ -139,7 +128,7 @@ static void __init tegra_dt_init(void)
                "Unknown platform! Pinmuxing not initialized\n");
 }
 
-static const char * tegra_dt_board_compat[] = {
+static const char *tegra20_dt_board_compat[] = {
        "compulab,trimslice",
        "nvidia,harmony",
        "compal,paz00",
@@ -148,12 +137,12 @@ static const char * tegra_dt_board_compat[] = {
        NULL
 };
 
-DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
+DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
        .map_io         = tegra_map_common_io,
-       .init_early     = tegra_init_early,
+       .init_early     = tegra20_init_early,
        .init_irq       = tegra_dt_init_irq,
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_dt_init,
-       .dt_compat      = tegra_dt_board_compat,
+       .dt_compat      = tegra20_dt_board_compat,
 MACHINE_END
index fd190a8dc6654c7e8fb200d85d596ffd15c26f2b..d60a0d45f2f76c623adad51b0f14c1656d0b3971 100644 (file)
@@ -186,7 +186,7 @@ MACHINE_START(HARMONY, "harmony")
        .atag_offset    = 0x100,
        .fixup          = tegra_harmony_fixup,
        .map_io         = tegra_map_common_io,
-       .init_early     = tegra_init_early,
+       .init_early     = tegra20_init_early,
        .init_irq       = tegra_init_irq,
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
index 0b7e1cfee70dacb03f9810a5f3ca90a316238737..e68b40727e6d86e014a31e4ab5c059585dfdadc6 100644 (file)
@@ -189,7 +189,7 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
        .atag_offset    = 0x100,
        .fixup          = tegra_paz00_fixup,
        .map_io         = tegra_map_common_io,
-       .init_early     = tegra_init_early,
+       .init_early     = tegra20_init_early,
        .init_irq       = tegra_init_irq,
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
index 7328379b1356b0fd8ac54d5f268bae71d7fdf11e..b79f9ce9941c6eeb2dd7da3e9ae346f8e220d3b8 100644 (file)
@@ -283,7 +283,7 @@ static void __init tegra_wario_init(void)
 MACHINE_START(SEABOARD, "seaboard")
        .atag_offset    = 0x100,
        .map_io         = tegra_map_common_io,
-       .init_early     = tegra_init_early,
+       .init_early     = tegra20_init_early,
        .init_irq       = tegra_init_irq,
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
@@ -293,7 +293,7 @@ MACHINE_END
 MACHINE_START(KAEN, "kaen")
        .atag_offset    = 0x100,
        .map_io         = tegra_map_common_io,
-       .init_early     = tegra_init_early,
+       .init_early     = tegra20_init_early,
        .init_irq       = tegra_init_irq,
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
@@ -303,7 +303,7 @@ MACHINE_END
 MACHINE_START(WARIO, "wario")
        .atag_offset    = 0x100,
        .map_io         = tegra_map_common_io,
-       .init_early     = tegra_init_early,
+       .init_early     = tegra20_init_early,
        .init_irq       = tegra_init_irq,
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
index 60a36a2e0be19696c9a53e96b1afaf716c93fee5..4a197a20be93851760bc44778837767d593f8666 100644 (file)
@@ -175,7 +175,7 @@ MACHINE_START(TRIMSLICE, "trimslice")
        .atag_offset    = 0x100,
        .fixup          = tegra_trimslice_fixup,
        .map_io         = tegra_map_common_io,
-       .init_early     = tegra_init_early,
+       .init_early     = tegra20_init_early,
        .init_irq       = tegra_init_irq,
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
index 1d14df7eb7de97946faa00ae790a16fc6ee3d461..fdec3ffa4455a0f39779cc30eee62bcb2f00d8db 100644 (file)
 
 void tegra_assert_system_reset(char mode, const char *cmd);
 
-void __init tegra_init_early(void);
+void __init tegra20_init_early(void);
 void __init tegra_map_common_io(void);
 void __init tegra_init_irq(void);
+void __init tegra_dt_init_irq(void);
 void __init tegra_init_clock(void);
 int __init tegra_pcie_init(bool init_port0, bool init_port1);
 
index 690b888be506b0f1e841a19f96180966cce00c89..0fafb60497a5b38d11f4c5bee62184f1fda88565 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-tegra/board-harmony.c
+ * arch/arm/mach-tegra/common.c
  *
  * Copyright (C) 2010 Google, Inc.
  *
 #include <linux/io.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/of_irq.h>
 
 #include <asm/hardware/cache-l2x0.h>
+#include <asm/hardware/gic.h>
 
 #include <mach/iomap.h>
 #include <mach/system.h>
 
 void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset;
 
+static const struct of_device_id tegra_dt_irq_match[] __initconst = {
+       { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
+       { }
+};
+
+void __init tegra_dt_init_irq(void)
+{
+       tegra_init_irq();
+       of_irq_init(tegra_dt_irq_match);
+}
+
 void tegra_assert_system_reset(char mode, const char *cmd)
 {
        void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04);
@@ -44,7 +57,8 @@ void tegra_assert_system_reset(char mode, const char *cmd)
        writel_relaxed(reg, reset);
 }
 
-static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
+static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
        /* name         parent          rate            enabled */
        { "clk_m",      NULL,           0,              true },
        { "pll_p",      "clk_m",        216000000,      true },
@@ -60,6 +74,7 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
        { "cpu",        NULL,           0,              true },
        { NULL,         NULL,           0,              0},
 };
+#endif
 
 static void __init tegra_init_cache(void)
 {
@@ -74,10 +89,12 @@ static void __init tegra_init_cache(void)
 
 }
 
-void __init tegra_init_early(void)
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
+void __init tegra20_init_early(void)
 {
        tegra_init_fuse();
-       tegra_init_clock();
-       tegra_clk_init_from_table(common_clk_init_table);
+       tegra2_init_clocks();
+       tegra_clk_init_from_table(tegra20_clk_init_table);
        tegra_init_cache();
 }
+#endif