]> Pileus Git - ~andy/linux/commitdiff
mmc: sdhi, mmcif: zboot: Correct clock disable logic
authorSimon Horman <horms@verge.net.au>
Wed, 3 Aug 2011 06:08:54 +0000 (06:08 +0000)
committerPaul Mundt <lethal@linux-sh.org>
Mon, 8 Aug 2011 07:38:04 +0000 (16:38 +0900)
This corrects a logic-error that I made in the original implementation.

An alternate patch would be to just remove these lines and
leave the clock running as it is reconfigured later on during
boot anyway.

Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/arm/boot/compressed/mmcif-sh7372.c
arch/arm/boot/compressed/sdhi-sh7372.c

index b6f61d9a5a1b5279bf8576267b5a788f9f1cfe40..672ae95db5c3177aedc1dfdb3825a490b31e9fc2 100644 (file)
@@ -82,7 +82,7 @@ asmlinkage void mmc_loader(unsigned char *buf, unsigned long len)
 
 
        /* Disable clock to MMC hardware block */
-       __raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3);
+       __raw_writel(__raw_readl(SMSTPCR3) | (1 << 12), SMSTPCR3);
 
        mmc_update_progress(MMC_PROGRESS_DONE);
 }
index d403a8b24d7f322ad8b53c58ce047a06dc2bc0f8..d279294f238116fa4fbd3c71931149528516b483 100644 (file)
@@ -85,7 +85,7 @@ asmlinkage void mmc_loader(unsigned short *buf, unsigned long len)
                goto err;
 
         /* Disable clock to SDHI1 hardware block */
-        __raw_writel(__raw_readl(SMSTPCR3) & (1 << 13), SMSTPCR3);
+        __raw_writel(__raw_readl(SMSTPCR3) | (1 << 13), SMSTPCR3);
 
        mmc_update_progress(MMC_PROGRESS_DONE);