]> Pileus Git - ~andy/linux/commitdiff
PCI: Remove unused field pcie_type from struct pci_dev
authorYijing Wang <wangyijing@huawei.com>
Tue, 24 Jul 2012 09:20:04 +0000 (17:20 +0800)
committerBjorn Helgaas <bhelgaas@google.com>
Thu, 23 Aug 2012 15:41:05 +0000 (09:41 -0600)
With introduction of pci_pcie_type(), pci_dev->pcie_type field becomes
redundant, so remove it.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/probe.c
include/linux/pci.h

index 1d52a43eb0867df9813bb0fe651bcfa75b754ff0..8bcc985faa16c0c4c073ed5fceeb44be743e6573 100644 (file)
@@ -930,7 +930,6 @@ void set_pcie_port_type(struct pci_dev *pdev)
        pdev->pcie_cap = pos;
        pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
        pdev->pcie_flags_reg = reg16;
-       pdev->pcie_type = pci_pcie_type(pdev);
        pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, &reg16);
        pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
 }
index 95662b2f0c3d08272466dd8f107df7157feb692d..9807da507e1f626712a72ec90127a3390980cb87 100644 (file)
@@ -254,7 +254,6 @@ struct pci_dev {
        u8              revision;       /* PCI revision, low byte of class word */
        u8              hdr_type;       /* PCI header type (`multi' flag masked out) */
        u8              pcie_cap;       /* PCI-E capability offset */
-       u8              pcie_type:4;    /* PCI-E device/port type */
        u8              pcie_mpss:3;    /* PCI-E Max Payload Size Supported */
        u8              rom_base_reg;   /* which config register controls the ROM */
        u8              pin;            /* which interrupt pin this device uses */