]> Pileus Git - ~andy/linux/commitdiff
serial: sh-sci: Update break_ctl handling for all SCSPTR-capable regtypes.
authorShimoda, Yoshihiro <yoshihiro.shimoda.uh@renesas.com>
Thu, 12 Apr 2012 10:19:21 +0000 (19:19 +0900)
committerPaul Mundt <lethal@linux-sh.org>
Thu, 12 Apr 2012 10:19:21 +0000 (19:19 +0900)
This updates the earlier break_ctl support regardless of regtype so long
as the requisite SCSPTR exists. This is the same approach used by
sci_init_pins() for providing a generic solution now that we're able to
detect register capabilities on a per-port basis.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
drivers/tty/serial/sh-sci.c

index 3e471fc12991e99dc505c4e952c65e5a661d44a9..be31d85a50e370fb788a0260897f38080172d66d 100644 (file)
@@ -1565,31 +1565,31 @@ static void sci_enable_ms(struct uart_port *port)
 static void sci_break_ctl(struct uart_port *port, int break_state)
 {
        struct sci_port *s = to_sci_port(port);
+       struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR;
        unsigned short scscr, scsptr;
 
-       switch (s->cfg->regtype) {
-       case SCIx_SH4_SCIF_REGTYPE:
-               scsptr = serial_port_in(port, SCSPTR);
-               scscr = serial_port_in(port, SCSCR);
-
-               if (break_state == -1) {
-                       scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT;
-                       scscr &= ~SCSCR_TE;
-               } else {
-                       scsptr = (scsptr | SCSPTR_SPB2DT) & ~SCSPTR_SPB2IO;
-                       scscr |= SCSCR_TE;
-               }
-
-               serial_port_out(port, SCSPTR, scsptr);
-               serial_port_out(port, SCSCR, scscr);
-               break;
-       default:
+       /* check wheter the port has SCSPTR */
+       if (!reg->size) {
                /*
                 * Not supported by hardware. Most parts couple break and rx
                 * interrupts together, with break detection always enabled.
                 */
-               break;
+               return;
        }
+
+       scsptr = serial_port_in(port, SCSPTR);
+       scscr = serial_port_in(port, SCSCR);
+
+       if (break_state == -1) {
+               scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT;
+               scscr &= ~SCSCR_TE;
+       } else {
+               scsptr = (scsptr | SCSPTR_SPB2DT) & ~SCSPTR_SPB2IO;
+               scscr |= SCSCR_TE;
+       }
+
+       serial_port_out(port, SCSPTR, scsptr);
+       serial_port_out(port, SCSCR, scscr);
 }
 
 #ifdef CONFIG_SERIAL_SH_SCI_DMA