]> Pileus Git - ~andy/linux/commitdiff
i40e: Suppress HMC error to Interrupt message level
authorAnjali Singhai Jain <anjali.singhai@intel.com>
Thu, 28 Nov 2013 06:39:20 +0000 (06:39 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Sat, 4 Jan 2014 02:59:51 +0000 (18:59 -0800)
The HMC error interrupt would generate an un-necessary message
"unhandled interrupt", causing extra log spam, in addition to causing
a reset that was not necessary.  Prevent this issue by handling the
HMC error case explicitly, and only reset if the interrupt was from
some of the other causes.

Change-Id: Iabd203ba1dfc26a136b638597f3e9991acfa29f3
Signed-off-by: Shannon Nelson <shannon.nelson@intel.com>
Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/i40e/i40e_main.c

index efdf8a261b9a4e4ade4fbb667efec8ea940f74a6..f14b31c67e267e53d0fee10b205dbc9121496aed 100644 (file)
@@ -2814,6 +2814,11 @@ static irqreturn_t i40e_intr(int irq, void *data)
                        pf->empr_count++;
        }
 
+       if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
+               icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
+               dev_info(&pf->pdev->dev, "HMC error interrupt\n");
+       }
+
        /* If a critical error is pending we have no choice but to reset the
         * device.
         * Report and mask out any remaining unexpected interrupts.
@@ -2822,18 +2827,13 @@ static irqreturn_t i40e_intr(int irq, void *data)
        if (icr0_remaining) {
                dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
                         icr0_remaining);
-               if ((icr0_remaining & I40E_PFINT_ICR0_HMC_ERR_MASK) ||
-                   (icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
+               if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
                    (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
                    (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK) ||
                    (icr0_remaining & I40E_PFINT_ICR0_MAL_DETECT_MASK)) {
-                       if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
-                               dev_info(&pf->pdev->dev, "HMC error interrupt\n");
-                       } else {
-                               dev_info(&pf->pdev->dev, "device will be reset\n");
-                               set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
-                               i40e_service_event_schedule(pf);
-                       }
+                       dev_info(&pf->pdev->dev, "device will be reset\n");
+                       set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
+                       i40e_service_event_schedule(pf);
                }
                ena_mask &= ~icr0_remaining;
        }