MXC: pass base/irq to mxc_timer_init

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

diff --git a/arch/arm/mach-mx1/clock.c b/arch/arm/mach-mx1/clock.c
index 0d0f306851d04ca9b4e9aeeb87639a04899311b5..7b739dd8700dacb781a222c67d459dc88daa114d 100644 (file)
--- a/arch/arm/mach-mx1/clock.c
+++ b/arch/arm/mach-mx1/clock.c
@@ -626,7 +626,7 @@ int __init mx1_clocks_init(unsigned long fref)
        clk_enable(&hclk);
        clk_enable(&fclk);
 
-       mxc_timer_init(&gpt_clk);
+       mxc_timer_init(&gpt_clk, IO_ADDRESS(TIM1_BASE_ADDR), TIM1_INT);
 
        return 0;
 }

diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index 0850fb88ec15f4dc9e41d3c4bd6e04e6a66e58ab..eede79855f4af0565217f94c7b2e8ce6412f9e56 100644 (file)
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -1004,6 +1004,6 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
        clk_enable(&uart_clk[0]);
 #endif
 
-       mxc_timer_init(&gpt_clk[0]);
+       mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
        return 0;
 }

diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 2c971442f3f2ad3b2c2331fadbe704045570d808..a0c577f80d4cba83bf5d388a4e83d75e0892fb7e 100644 (file)
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -748,7 +748,7 @@ int __init mx27_clocks_init(unsigned long fref)
        clk_enable(&uart1_clk);
 #endif
 
-       mxc_timer_init(&gpt1_clk);
+       mxc_timer_init(&gpt1_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
 
        return 0;
 }

diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 577ee83d1f605eb748ea2921032b5901942f8529..4cf1849f552e2f038c9a3032a52ee8d5e7288529 100644 (file)
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -456,7 +456,7 @@ int __init mx35_clocks_init()
        __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2);
        __raw_writel(0, CCM_BASE + CCM_CGR3);
 
-       mxc_timer_init(&gpt_clk);
+       mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
 
        return 0;
 }

diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index 8b14239724c97fe90746878f6c3727f62bdf7066..25b6f55bfb03694adefae648dbf726fee421622e 100644 (file)
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -29,6 +29,7 @@
 
 #include <mach/clock.h>
 #include <mach/hardware.h>
+#include <mach/mx31.h>
 #include <mach/common.h>
 
 #include "crm_regs.h"
@@ -609,7 +610,7 @@ int __init mx31_clocks_init(unsigned long fref)
                __raw_writel(reg, MXC_CCM_PMCR1);
        }
 
-       mxc_timer_init(&ipg_clk);
+       mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
 
        return 0;
 }

diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 02c3cd004db3b7a52f045be026a75d3f26eaab04..1c48aefe4b6ee59f6d1fb81d3a204a732ec1ddf4 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -20,7 +20,7 @@ extern void mx27_map_io(void);
 extern void mx31_map_io(void);
 extern void mx35_map_io(void);
 extern void mxc_init_irq(void);
-extern void mxc_timer_init(struct clk *timer_clk);
+extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int);
 extern int mx1_clocks_init(unsigned long fref);
 extern int mx21_clocks_init(unsigned long lref, unsigned long fref);
 extern int mx27_clocks_init(unsigned long fref);

diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 88fb3a57e0299fcf25c61f4ea054f09601b64efd..7e71bb6270eb87e7f08a206010d0287e94b0439b 100644 (file)
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -281,30 +281,13 @@ static int __init mxc_clockevent_init(struct clk *timer_clk)
        return 0;
 }
 
-void __init mxc_timer_init(struct clk *timer_clk)
+void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
 {
        uint32_t tctl_val;
-       int irq;
 
        clk_enable(timer_clk);
 
-       if (cpu_is_mx1()) {
-#ifdef CONFIG_ARCH_MX1
-               timer_base = IO_ADDRESS(TIM1_BASE_ADDR);
-               irq = TIM1_INT;
-#endif
-       } else if (cpu_is_mx2()) {
-#ifdef CONFIG_ARCH_MX2
-               timer_base = IO_ADDRESS(GPT1_BASE_ADDR);
-               irq = MXC_INT_GPT1;
-#endif
-       } else if (cpu_is_mx3()) {
-#ifdef CONFIG_ARCH_MX3
-               timer_base = IO_ADDRESS(GPT1_BASE_ADDR);
-               irq = MXC_INT_GPT;
-#endif
-       } else
-               BUG();
+       timer_base = base;
 
        /*
         * Initialise to a known state (all timers off, and timing reset)