return platform_add_devices(edosk7705_devices,
ARRAY_SIZE(edosk7705_devices));
}
-__initcall(init_edosk7705_devices);
+device_initcall(init_edosk7705_devices);
/*
* The Machine Vector
return platform_add_devices(edosk7760_devices,
ARRAY_SIZE(edosk7760_devices));
}
-__initcall(init_edosk7760_devices);
+device_initcall(init_edosk7760_devices);
/*
* The Machine Vector
return platform_add_devices(sh7785lcr_devices,
ARRAY_SIZE(sh7785lcr_devices));
}
-__initcall(sh7785lcr_devices_setup);
+device_initcall(sh7785lcr_devices_setup);
/* Initialize IRQ setting */
void __init init_sh7785lcr_IRQ(void)
return 0;
}
-__initcall(smsc_superio_setup);
+device_initcall(smsc_superio_setup);
static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len)
{
/*
- * arch/sh/boards/landisk/irq.c
+ * arch/sh/boards/mach-landisk/irq.c
*
* I-O DATA Device, Inc. LANDISK Support
*
* Copyright (C) 2005-2007 kogiidena
+ * Copyright (C) 2011 Nobuhiro Iwamatsu
*
* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
* Based largely on io_se.c.
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
+
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <mach-landisk/mach/iodata_landisk.h>
-static void disable_landisk_irq(struct irq_data *data)
-{
- unsigned char mask = 0xff ^ (0x01 << (data->irq - 5));
+enum {
+ UNUSED = 0,
- __raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK);
-}
-
-static void enable_landisk_irq(struct irq_data *data)
-{
- unsigned char value = (0x01 << (data->irq - 5));
+ PCI_INTA, /* PCI int A */
+ PCI_INTB, /* PCI int B */
+ PCI_INTC, /* PCI int C */
+ PCI_INTD, /* PCI int D */
+ ATA, /* ATA */
+ FATA, /* CF */
+ POWER, /* Power swtich */
+ BUTTON, /* Button swtich */
+};
- __raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK);
-}
+/* Vectors for LANDISK */
+static struct intc_vect vectors_landisk[] __initdata = {
+ INTC_IRQ(PCI_INTA, IRQ_PCIINTA),
+ INTC_IRQ(PCI_INTB, IRQ_PCIINTB),
+ INTC_IRQ(PCI_INTC, IRQ_PCIINTC),
+ INTC_IRQ(PCI_INTD, IRQ_PCIINTD),
+ INTC_IRQ(ATA, IRQ_ATA),
+ INTC_IRQ(FATA, IRQ_FATA),
+ INTC_IRQ(POWER, IRQ_POWER),
+ INTC_IRQ(BUTTON, IRQ_BUTTON),
+};
-static struct irq_chip landisk_irq_chip __read_mostly = {
- .name = "LANDISK",
- .irq_mask = disable_landisk_irq,
- .irq_unmask = enable_landisk_irq,
+/* IRLMSK mask register layout for LANDISK */
+static struct intc_mask_reg mask_registers_landisk[] __initdata = {
+ { PA_IMASK, 0, 8, /* IRLMSK */
+ { BUTTON, POWER, FATA, ATA,
+ PCI_INTD, PCI_INTC, PCI_INTB, PCI_INTA,
+ }
+ },
};
+static DECLARE_INTC_DESC(intc_desc_landisk, "landisk", vectors_landisk, NULL,
+ mask_registers_landisk, NULL, NULL);
/*
* Initialize IRQ setting
*/
void __init init_landisk_IRQ(void)
{
- int i;
-
- for (i = 5; i < 14; i++) {
- disable_irq_nosync(i);
- set_irq_chip_and_handler_name(i, &landisk_irq_chip,
- handle_level_irq, "level");
- enable_landisk_irq(irq_get_irq_data(i));
- }
+ register_intc_controller(&intc_desc_landisk);
__raw_writeb(0x00, PA_PWRINT_CLR);
}
#include <mach-landisk/mach/iodata_landisk.h>
#include <asm/io.h>
-void init_landisk_IRQ(void);
-
static void landisk_power_off(void)
{
__raw_writeb(0x01, PA_SHUTDOWN);
ARRAY_SIZE(landisk_devices));
}
-__initcall(landisk_devices_setup);
+device_initcall(landisk_devices_setup);
static void __init landisk_setup(char **cmdline_p)
{
return platform_add_devices(rts7751r2d_devices,
ARRAY_SIZE(rts7751r2d_devices));
}
-__initcall(rts7751r2d_devices_setup);
+device_initcall(rts7751r2d_devices_setup);
static void rts7751r2d_power_off(void)
{
#include <linux/i2c.h>
#include <linux/irq.h>
#include <linux/clk.h>
+#include <linux/clkdev.h>
#include <mach/fpga.h>
#include <mach/irq.h>
#include <asm/machvec.h>
#include <asm/heartbeat.h>
#include <asm/sizes.h>
#include <asm/clock.h>
-#include <asm/clkdev.h>
#include <asm/reboot.h>
#include <asm/smp-ops.h>
return sdk7786_i2c_setup();
}
-__initcall(sdk7786_devices_setup);
+device_initcall(sdk7786_devices_setup);
static int sdk7786_mode_pins(void)
{
{
return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices));
}
-__initcall(se7206_devices_setup);
+device_initcall(se7206_devices_setup);
static int se7206_mode_pins(void)
{
{
return platform_add_devices(se7751_devices, ARRAY_SIZE(se7751_devices));
}
-__initcall(se7751_devices_setup);
+device_initcall(se7751_devices_setup);
/*
* The Machine Vector
return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices));
}
-__initcall(sh03_devices_setup);
+device_initcall(sh03_devices_setup);
static struct sh_machine_vector mv_sh03 __initmv = {
.mv_name = "Interface (CTP/PCI-SH03)",
#define HIZCRC 0xa405015c
#define DRVCRA 0xa405018a
-enum { MMCIF_PROGRESS_ENTER, MMCIF_PROGRESS_INIT,
- MMCIF_PROGRESS_LOAD, MMCIF_PROGRESS_DONE };
-
/* SH7724 specific MMCIF loader
*
* loads the romImage from an MMC card starting from block 512
mmcif_update_progress(MMCIF_PROGRESS_LOAD);
/* load kernel via MMCIF interface */
- sh_mmcif_boot_slurp(MMCIF_BASE, buf, no_bytes);
+ sh_mmcif_boot_do_read(MMCIF_BASE, 512,
+ (no_bytes + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS,
+ buf);
/* disable clock to the MMCIF hardware block */
__raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_FW_LOADER is not set
CONFIG_BLK_DEV_RAM=y
-# CONFIG_MISC_DEVICES is not set
CONFIG_NETDEVICES=y
-CONFIG_PHYLIB=y
CONFIG_VITESSE_PHY=y
-CONFIG_MDIO_BITBANG=y
CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
+CONFIG_SH_ETH=y
# CONFIG_NETDEV_10000 is not set
# CONFIG_WLAN is not set
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_MOUSE_PS2 is not set
# CONFIG_SERIO is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=3
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
-CONFIG_INOTIFY=y
CONFIG_ISO9660_FS=y
CONFIG_VFAT_FS=y
CONFIG_PROC_KCORE=y
CONFIG_NLS_CODEPAGE_932=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
-# CONFIG_DETECT_SOFTLOCKUP is not set
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_FTRACE is not set
# CONFIG_CRYPTO_ANSI_CPRNG is not set
/*
- * arch/sh/drivers/pci/ops-landisk.c
+ * arch/sh/drivers/pci/fixups-landisk.c
*
* PCI initialization for the I-O DATA Device, Inc. LANDISK board
*
* Copyright (C) 2006 kogiidena
+ * Copyright (C) 2010 Nobuhiro Iwamatsu
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
#include <linux/pci.h>
#include "pci-sh4.h"
+#define PCIMCR_MRSET_OFF 0xBFFFFFFF
+#define PCIMCR_RFSH_OFF 0xFFFFFFFB
+
int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
/*
int irq = ((slot + pin - 1) & 0x3) + 5;
if ((slot | (pin - 1)) > 0x3) {
- printk("PCI: Bad IRQ mapping request for slot %d pin %c\n",
+ printk(KERN_WARNING "PCI: Bad IRQ mapping request for slot %d pin %c\n",
slot, pin - 1 + 'A');
return -1;
}
return irq;
}
+
+int pci_fixup_pcic(struct pci_channel *chan)
+{
+ unsigned long bcr1, mcr;
+
+ bcr1 = __raw_readl(SH7751_BCR1);
+ bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
+ pci_write_reg(chan, bcr1, SH4_PCIBCR1);
+
+ mcr = __raw_readl(SH7751_MCR);
+ mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
+ pci_write_reg(chan, mcr, SH4_PCIMCR);
+
+ pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5);
+ pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6);
+ pci_write_reg(chan, 0x0c000000, SH4_PCILAR0);
+ pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
+
+ return 0;
+}
*
* While read{b,w,l,q} and write{b,w,l,q} contain memory barriers
* automatically, there are also __raw versions, which do not.
- *
- * Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for
- * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice
- * these have the same semantics as the __raw variants, and as such, all
- * new code should be using the __raw versions.
*/
#include <linux/errno.h>
#include <asm/cache.h>
#endif
-/*
- * Legacy SuperH on-chip I/O functions
- *
- * These are all deprecated, all new (and especially cross-platform) code
- * should be using the __raw_xxx() routines directly.
- */
-static inline u8 __deprecated ctrl_inb(unsigned long addr)
-{
- return __raw_readb(addr);
-}
-
-static inline u16 __deprecated ctrl_inw(unsigned long addr)
-{
- return __raw_readw(addr);
-}
-
-static inline u32 __deprecated ctrl_inl(unsigned long addr)
-{
- return __raw_readl(addr);
-}
-
-static inline u64 __deprecated ctrl_inq(unsigned long addr)
-{
- return __raw_readq(addr);
-}
-
-static inline void __deprecated ctrl_outb(u8 v, unsigned long addr)
-{
- __raw_writeb(v, addr);
-}
-
-static inline void __deprecated ctrl_outw(u16 v, unsigned long addr)
-{
- __raw_writew(v, addr);
-}
-
-static inline void __deprecated ctrl_outl(u32 v, unsigned long addr)
-{
- __raw_writel(v, addr);
-}
-
-static inline void __deprecated ctrl_outq(u64 v, unsigned long addr)
-{
- __raw_writeq(v, addr);
-}
-
#define IO_SPACE_LIMIT 0xffffffff
/* synco on SH-4A, otherwise a nop */
#define __ASM_SH_IODATA_LANDISK_H
/*
- * linux/include/asm-sh/landisk/iodata_landisk.h
+ * arch/sh/include/mach-landisk/mach/iodata_landisk.h
*
* Copyright (C) 2000 Atom Create Engineering Co., Ltd.
*
#define IRQ_PCIINTA 5 /* PCI INTA IRQ */
#define IRQ_PCIINTB 6 /* PCI INTB IRQ */
-#define IRQ_PCIINDC 7 /* PCI INTC IRQ */
+#define IRQ_PCIINTC 7 /* PCI INTC IRQ */
#define IRQ_PCIINTD 8 /* PCI INTD IRQ */
#define IRQ_ATA 9 /* ATA IRQ */
#define IRQ_FATA 10 /* FATA IRQ */
#define IRQ_BUTTON 12 /* USL-5P Button IRQ */
#define IRQ_FAULT 13 /* USL-5P Fault IRQ */
+void init_landisk_IRQ(void);
+
#define __IO_PREFIX landisk
#include <asm/io_generic.h>
boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
break;
case 0x10:
+ case 0x11:
boot_cpu_data.type = CPU_SH7757;
break;
}
#define SH_MMCIF_BBS 512 /* boot block size */
+enum { MMCIF_PROGRESS_ENTER, MMCIF_PROGRESS_INIT,
+ MMCIF_PROGRESS_LOAD, MMCIF_PROGRESS_DONE };
+
static inline void sh_mmcif_boot_cmd_send(void __iomem *base,
unsigned long cmd, unsigned long arg)
{
unsigned long k;
int ret = 0;
+ /* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */
+ sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL,
+ CLK_ENABLE | CLKDIV_4 | SRSPTO_256 |
+ SRBSYTO_29 | SRWDTO_29 | SCCSTO_29);
+
+ /* CMD9 - Get CSD */
+ sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000);
+
+ /* CMD7 - Select the card */
+ sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000);
+
/* CMD16 - Set the block size */
sh_mmcif_boot_cmd(base, 0x10400000, SH_MMCIF_BBS);
sh_mmcif_boot_cmd(base, 0x03400040, 0x00010000);
}
-static inline void sh_mmcif_boot_slurp(void __iomem *base,
- unsigned char *buf,
- unsigned long no_bytes)
-{
- unsigned long tmp;
-
- /* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */
- sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL,
- CLK_ENABLE | CLKDIV_4 | SRSPTO_256 |
- SRBSYTO_29 | SRWDTO_29 | SCCSTO_29);
-
- /* CMD9 - Get CSD */
- sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000);
-
- /* CMD7 - Select the card */
- sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000);
-
- tmp = no_bytes / SH_MMCIF_BBS;
- tmp += (no_bytes % SH_MMCIF_BBS) ? 1 : 0;
-
- sh_mmcif_boot_do_read(base, 512, tmp, buf);
-}
-
#endif /* __SH_MMCIF_H__ */
projects / ~andy / linux / commitdiff