ixgbe: Cleanup configuration of FCoE registers

This change makes it so we always use the FCoE redirection table.  We just
set all 8 entries to the same value in the case of only having one queue
for FCoE.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c
index 9b0909ffd7a649ce40792eae9caa21936055e3a5..a994570eb906b97c6bd5142f8cf7f4718604f6bd 100644 (file)
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c
@@ -618,6 +618,7 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
        struct ixgbe_fcoe *fcoe = &adapter->fcoe;
        struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
        unsigned int cpu;
+       u32 etqf;
 
        if (!fcoe->pool) {
                spin_lock_init(&fcoe->lock);
@@ -665,40 +666,43 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
                }
        }
 
-       /* Enable L2 eth type filter for FCoE */
-       IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE),
-                       (ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN));
-       /* Enable L2 eth type filter for FIP */
-       IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FIP),
-                       (ETH_P_FIP | IXGBE_ETQF_FILTER_EN));
-       if (adapter->ring_feature[RING_F_FCOE].indices) {
-               /* Use multiple rx queues for FCoE by redirection table */
-               for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
-                       fcoe_i = f->offset + i % f->indices;
-                       fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
-                       fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
-                       IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
-               }
-               IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
-               IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);
-       } else  {
-               /* Use single rx queue for FCoE */
-               fcoe_i = f->offset;
+       /* Enable L2 EtherType filter for FCoE, necessary for FCoE Rx CRC */
+       etqf = ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN;
+       if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
+               etqf |= IXGBE_ETQF_POOL_ENABLE;
+               etqf |= VMDQ_P(0) << IXGBE_ETQF_POOL_SHIFT;
+       }
+       IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE), etqf);
+       IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);
+
+       /* Use one or more Rx queues for FCoE by redirection table */
+       for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
+               fcoe_i = f->offset + (i % f->indices);
+               fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
                fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
-               IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, 0);
-               IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE),
-                               IXGBE_ETQS_QUEUE_EN |
-                               (fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
+               IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
        }
-       /* send FIP frames to the first FCoE queue */
-       fcoe_i = f->offset;
-       fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
+       IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
+
+       /* Enable L2 EtherType filter for FIP */
+       etqf = ETH_P_FIP | IXGBE_ETQF_FILTER_EN;
+       if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
+               etqf |= IXGBE_ETQF_POOL_ENABLE;
+               etqf |= VMDQ_P(0) << IXGBE_ETQF_POOL_SHIFT;
+       }
+       IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FIP), etqf);
+
+       /* Send FIP frames to the first FCoE queue */
+       fcoe_q = adapter->rx_ring[f->offset]->reg_idx;
        IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FIP),
                        IXGBE_ETQS_QUEUE_EN |
                        (fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
 
-       IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL, IXGBE_FCRXCTRL_FCCRCBO |
+       /* Configure FCoE Rx control */
+       IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL,
+                       IXGBE_FCRXCTRL_FCCRCBO |
                        (FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));
+
        return;
 out_pcpu_noddp_extra_buff_alloc_fail:
        free_percpu(fcoe->pcpu_noddp);

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index 7416d22ec2278bed474ed54e05db93b46060f6a9..482a33b0eb46a870e4996c0c25086caa9e689cae 100644 (file)
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
@@ -1452,6 +1452,7 @@ enum {
 #define IXGBE_ETQF_1588         0x40000000 /* bit 30 */
 #define IXGBE_ETQF_FILTER_EN    0x80000000 /* bit 31 */
 #define IXGBE_ETQF_POOL_ENABLE   (1 << 26) /* bit 26 */
+#define IXGBE_ETQF_POOL_SHIFT          20
 
 #define IXGBE_ETQS_RX_QUEUE     0x007F0000 /* bits 22:16 */
 #define IXGBE_ETQS_RX_QUEUE_SHIFT       16