]> Pileus Git - ~andy/linux/commitdiff
ARM: tegra: remove legacy DMA entries from DT
authorStephen Warren <swarren@nvidia.com>
Mon, 11 Nov 2013 20:25:54 +0000 (13:25 -0700)
committerStephen Warren <swarren@nvidia.com>
Wed, 11 Dec 2013 23:45:02 +0000 (16:45 -0700)
Now that all Tegra drivers have been converted to use DMA APIs which
retrieve DMA channel information from standard DMA DT properties, we can
remove all the legacy DT DMA-related properties.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra114.dtsi
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30.dtsi

index d0da8b7aa4dfe05602d453496e9f63a793886d53..731249fbe2064f53d5fb6bce7a20ff22953f3ba8 100644 (file)
                reg = <0x70006000 0x40>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 8>;
                clocks = <&tegra_car TEGRA114_CLK_UARTA>;
                resets = <&tegra_car 6>;
                reset-names = "serial";
                reg = <0x70006040 0x40>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 9>;
                clocks = <&tegra_car TEGRA114_CLK_UARTB>;
                resets = <&tegra_car 7>;
                reset-names = "serial";
                reg = <0x70006200 0x100>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 10>;
                clocks = <&tegra_car TEGRA114_CLK_UARTC>;
                resets = <&tegra_car 55>;
                reset-names = "serial";
                reg = <0x70006300 0x100>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 19>;
                clocks = <&tegra_car TEGRA114_CLK_UARTD>;
                resets = <&tegra_car 65>;
                reset-names = "serial";
                compatible = "nvidia,tegra114-spi";
                reg = <0x7000d400 0x200>;
                interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 15>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA114_CLK_SBC1>;
                compatible = "nvidia,tegra114-spi";
                reg = <0x7000d600 0x200>;
                interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 16>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA114_CLK_SBC2>;
                compatible = "nvidia,tegra114-spi";
                reg = <0x7000d800 0x200>;
                interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 17>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA114_CLK_SBC3>;
                compatible = "nvidia,tegra114-spi";
                reg = <0x7000da00 0x200>;
                interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 18>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA114_CLK_SBC4>;
                compatible = "nvidia,tegra114-spi";
                reg = <0x7000dc00 0x200>;
                interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 27>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA114_CLK_SBC5>;
                compatible = "nvidia,tegra114-spi";
                reg = <0x7000de00 0x200>;
                interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 28>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA114_CLK_SBC6>;
                      <0x70080200 0x100>,
                      <0x70081000 0x200>;
                interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 1>, <&apbdma 2>,
-                       <&apbdma 3>, <&apbdma 4>, <&apbdma 6>, <&apbdma 7>,
-                       <&apbdma 12>, <&apbdma 13>, <&apbdma 14>,
-                       <&apbdma 29>;
                clocks = <&tegra_car TEGRA114_CLK_D_AUDIO>,
                         <&tegra_car TEGRA114_CLK_APBIF>;
                clock-names = "d_audio", "apbif";
index 4d903affa7d050b19058db6240ac79a506c5540b..c90d0aac3afe8eb61f8f1b5c03545bd0585cf7b3 100644 (file)
                compatible = "nvidia,tegra20-ac97";
                reg = <0x70002000 0x200>;
                interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 12>;
                clocks = <&tegra_car TEGRA20_CLK_AC97>;
                resets = <&tegra_car 3>;
                reset-names = "ac97";
                compatible = "nvidia,tegra20-i2s";
                reg = <0x70002800 0x200>;
                interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 2>;
                clocks = <&tegra_car TEGRA20_CLK_I2S1>;
                resets = <&tegra_car 11>;
                reset-names = "i2s";
                compatible = "nvidia,tegra20-i2s";
                reg = <0x70002a00 0x200>;
                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 1>;
                clocks = <&tegra_car TEGRA20_CLK_I2S2>;
                resets = <&tegra_car 18>;
                reset-names = "i2s";
                reg = <0x70006000 0x40>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 8>;
                clocks = <&tegra_car TEGRA20_CLK_UARTA>;
                resets = <&tegra_car 6>;
                reset-names = "serial";
                reg = <0x70006040 0x40>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 9>;
                clocks = <&tegra_car TEGRA20_CLK_UARTB>;
                resets = <&tegra_car 7>;
                reset-names = "serial";
                reg = <0x70006200 0x100>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 10>;
                clocks = <&tegra_car TEGRA20_CLK_UARTC>;
                resets = <&tegra_car 55>;
                reset-names = "serial";
                reg = <0x70006300 0x100>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 19>;
                clocks = <&tegra_car TEGRA20_CLK_UARTD>;
                resets = <&tegra_car 65>;
                reset-names = "serial";
                reg = <0x70006400 0x100>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 20>;
                clocks = <&tegra_car TEGRA20_CLK_UARTE>;
                resets = <&tegra_car 66>;
                reset-names = "serial";
                compatible = "nvidia,tegra20-sflash";
                reg = <0x7000c380 0x80>;
                interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 11>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA20_CLK_SPI>;
                compatible = "nvidia,tegra20-slink";
                reg = <0x7000d400 0x200>;
                interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 15>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA20_CLK_SBC1>;
                compatible = "nvidia,tegra20-slink";
                reg = <0x7000d600 0x200>;
                interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 16>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA20_CLK_SBC2>;
                compatible = "nvidia,tegra20-slink";
                reg = <0x7000d800 0x200>;
                interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 17>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA20_CLK_SBC3>;
                compatible = "nvidia,tegra20-slink";
                reg = <0x7000da00 0x200>;
                interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 18>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA20_CLK_SBC4>;
index cf84edf0f435045586e85027190f8d57f7f5b59c..31259b09e7ccc3f97b4574deaf56f65a096ed8d9 100644 (file)
                reg = <0x70006000 0x40>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 8>;
                clocks = <&tegra_car TEGRA30_CLK_UARTA>;
                resets = <&tegra_car 6>;
                reset-names = "serial";
                reg = <0x70006040 0x40>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 9>;
                clocks = <&tegra_car TEGRA30_CLK_UARTB>;
                resets = <&tegra_car 7>;
                reset-names = "serial";
                reg = <0x70006200 0x100>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 10>;
                clocks = <&tegra_car TEGRA30_CLK_UARTC>;
                resets = <&tegra_car 55>;
                reset-names = "serial";
                reg = <0x70006300 0x100>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 19>;
                clocks = <&tegra_car TEGRA30_CLK_UARTD>;
                resets = <&tegra_car 65>;
                reset-names = "serial";
                reg = <0x70006400 0x100>;
                reg-shift = <2>;
                interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 20>;
                clocks = <&tegra_car TEGRA30_CLK_UARTE>;
                resets = <&tegra_car 66>;
                reset-names = "serial";
                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                reg = <0x7000d400 0x200>;
                interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 15>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA30_CLK_SBC1>;
                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                reg = <0x7000d600 0x200>;
                interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 16>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA30_CLK_SBC2>;
                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                reg = <0x7000d800 0x200>;
                interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 17>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA30_CLK_SBC3>;
                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                reg = <0x7000da00 0x200>;
                interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 18>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA30_CLK_SBC4>;
                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                reg = <0x7000dc00 0x200>;
                interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 27>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA30_CLK_SBC5>;
                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                reg = <0x7000de00 0x200>;
                interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 28>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&tegra_car TEGRA30_CLK_SBC6>;
                reg = <0x70080000 0x200
                       0x70080200 0x100>;
                interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-               nvidia,dma-request-selector = <&apbdma 1>;
                clocks = <&tegra_car TEGRA30_CLK_D_AUDIO>,
                         <&tegra_car TEGRA30_CLK_APBIF>;
                clock-names = "d_audio", "apbif";