]> Pileus Git - ~andy/linux/commitdiff
MIPS: Netlogic: Update PIC access functions
authorJayachandran C <jchandra@broadcom.com>
Wed, 31 Oct 2012 12:01:36 +0000 (12:01 +0000)
committerJohn Crispin <blogic@openwrt.org>
Fri, 9 Nov 2012 10:37:19 +0000 (11:37 +0100)
Remove unused and trivial PIC accesss functions, update nlm_pic_send_ipi()
and nlm_set_irt_to_cpu() to use similar logic, and use correct type for
reg in nlm_pic_disable_irt().

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4463
Signed-off-by: John Crispin <blogic@openwrt.org>
arch/mips/include/asm/netlogic/xlp-hal/pic.h

index 49ee15c1977151c836ef51e92b59435c97cbee3f..061e0710607a655176f61f16ae007d1bbcef1fb6 100644 (file)
@@ -273,36 +273,16 @@ nlm_pic_read_irt(uint64_t base, int irt_index)
        return nlm_read_pic_reg(base, PIC_IRT(irt_index));
 }
 
-static inline uint64_t
-nlm_pic_read_control(uint64_t base)
-{
-       return nlm_read_pic_reg(base, PIC_CTRL);
-}
-
-static inline void
-nlm_pic_write_control(uint64_t base, uint64_t control)
-{
-       nlm_write_pic_reg(base, PIC_CTRL, control);
-}
-
-static inline void
-nlm_pic_update_control(uint64_t base, uint64_t control)
-{
-       uint64_t val;
-
-       val = nlm_read_pic_reg(base, PIC_CTRL);
-       nlm_write_pic_reg(base, PIC_CTRL, control | val);
-}
-
 static inline void
 nlm_set_irt_to_cpu(uint64_t base, int irt, int cpu)
 {
        uint64_t val;
 
        val = nlm_read_pic_reg(base, PIC_IRT(irt));
-       val |= cpu & 0xf;
-       if (cpu > 15)
-               val |= 1 << 16;
+       /* clear cpuset and mask */
+       val &= ~((0x7ull << 16) | 0xffff);
+       /* set DB, cpuset and cpumask */
+       val |= (1 << 19) | ((cpu >> 4) << 16) | (1 << (cpu & 0xf));
        nlm_write_pic_reg(base, PIC_IRT(irt), val);
 }
 
@@ -369,7 +349,7 @@ nlm_pic_enable_irt(uint64_t base, int irt)
 static inline void
 nlm_pic_disable_irt(uint64_t base, int irt)
 {
-       uint32_t reg;
+       uint64_t reg;
 
        reg = nlm_read_pic_reg(base, PIC_IRT(irt));
        nlm_write_pic_reg(base, PIC_IRT(irt), reg & ~((uint64_t)1 << 31));
@@ -379,15 +359,9 @@ static inline void
 nlm_pic_send_ipi(uint64_t base, int hwt, int irq, int nmi)
 {
        uint64_t ipi;
-       int     node, ncpu;
-
-       node = hwt / 32;
-       ncpu = hwt & 0x1f;
-       ipi = ((uint64_t)nmi << 31) | (irq << 20) | (node << 17) |
-               (1 << (ncpu & 0xf));
-       if (ncpu > 15)
-               ipi |= 0x10000; /* Setting bit 16 to select cpus 16-31 */
 
+       ipi = (nmi << 31) | (irq << 20);
+       ipi |= ((hwt >> 4) << 16) | (1 << (hwt & 0xf)); /* cpuset and mask */
        nlm_write_pic_reg(base, PIC_IPI_CTL, ipi);
 }