ARM: tegra: Allow overriding arch_reset

Signed-off-by: Colin Cross <ccross@android.com>

diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h
index 0de565ca37c550709fd077278a398eccac7ace5c..b3f9c94fcb9edbbdbb8d2faecaa0913a70a24ca3 100644 (file)
--- a/arch/arm/mach-tegra/board.h
+++ b/arch/arm/mach-tegra/board.h
@@ -23,6 +23,8 @@
 
 #include <linux/types.h>
 
+void tegra_assert_system_reset(char mode, const char *cmd);
+
 void __init tegra_common_init(void);
 void __init tegra_map_common_io(void);
 void __init tegra_init_irq(void);

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 7c91e2b9d643fa5c18e07a606a1b5a543645c383..84a7197e1eff092d5b3f2bba7876c755d4d2130c 100644 (file)
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -26,11 +26,24 @@
 
 #include <mach/iomap.h>
 #include <mach/dma.h>
+#include <mach/system.h>
 
 #include "board.h"
 #include "clock.h"
 #include "fuse.h"
 
+void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset;
+
+void tegra_assert_system_reset(char mode, const char *cmd)
+{
+       void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04);
+       u32 reg;
+
+       reg = readl(reset);
+       reg |= 0x04;
+       writel(reg, reset);
+}
+
 static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
        /* name         parent          rate            enabled */
        { "clk_m",      NULL,           0,              true },

diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h
index 84d5d46113f7457b4e6bf8d7bfcb54ec8f4a0a20..d0183d876c3b45375c9ba3958e90c5a2b87dd75f 100644 (file)
--- a/arch/arm/mach-tegra/include/mach/system.h
+++ b/arch/arm/mach-tegra/include/mach/system.h
@@ -24,16 +24,10 @@
 #include <mach/hardware.h>
 #include <mach/iomap.h>
 
-static inline void arch_idle(void)
-{
-}
+extern void (*arch_reset)(char mode, const char *cmd);
 
-static inline void arch_reset(char mode, const char *cmd)
+static inline void arch_idle(void)
 {
-       void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04);
-       u32 reg = readl(reset);
-       reg |= 0x04;
-       writel(reg, reset);
 }
 
 #endif