]> Pileus Git - ~andy/linux/commitdiff
clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3
authorLauri Hintsala <lauri.hintsala@bluegiga.com>
Wed, 4 Jul 2012 10:49:54 +0000 (13:49 +0300)
committerShawn Guo <shawn.guo@linaro.org>
Thu, 5 Jul 2012 01:36:44 +0000 (09:36 +0800)
SSP0 and SSP1 use ref_io0 which has decreased frequency. Expand
the frequency fix for ref_io1 to get SSP2 and SSP3 to work.

Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
drivers/clk/mxs/clk-imx28.c

index 365053f052cd2c04e05cb4b0470cfa1a27fdeefa..98624eec5dd4bfeae9637e1f20c518e7bcc4038f 100644 (file)
@@ -112,11 +112,11 @@ static void __init clk_misc_init(void)
 
        /*
         * 480 MHz seems too high to be ssp clock source directly,
-        * so set frac0 to get a 288 MHz ref_io0.
+        * so set frac0 to get a 288 MHz ref_io0 and ref_io1.
         */
        val = readl_relaxed(FRAC0);
-       val &= ~(0x3f << BP_FRAC0_IO0FRAC);
-       val |= 30 << BP_FRAC0_IO0FRAC;
+       val &= ~((0x3f << BP_FRAC0_IO0FRAC) | (0x3f << BP_FRAC0_IO1FRAC));
+       val |= (30 << BP_FRAC0_IO0FRAC) | (30 << BP_FRAC0_IO1FRAC);
        writel_relaxed(val, FRAC0);
 }