]> Pileus Git - ~andy/linux/commitdiff
sh: sh772[34]: Set serial port sampling rate to 8 for SCIFA ports
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Fri, 6 Dec 2013 09:59:49 +0000 (10:59 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 24 Dec 2013 12:49:43 +0000 (21:49 +0900)
SCIFA ports on sh7723 and sh7724 seem to use a sampling rate of half the
value specified in the datasheet. This is currently handled by a custom
baud rate calculation algorithm. The algorithm ID will be removed from
platform data, set the sampling rate directly instead.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
arch/sh/kernel/cpu/sh4a/setup-sh7724.c

index 521a09ef4ffee0297613af099d3e791ca5b822c6..079951be412280f22261051d6d594fc7345dd9d7 100644 (file)
@@ -98,7 +98,7 @@ static struct plat_sci_port scif3_platform_data = {
        .flags          = UPF_BOOT_AUTOCONF,
        .port_reg       = SCIx_NOT_SUPPORTED,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
-       .scbrr_algo_id  = SCBRR_ALGO_3,
+       .sampling_rate  = 8,
        .type           = PORT_SCIFA,
 };
 
@@ -121,7 +121,7 @@ static struct plat_sci_port scif4_platform_data = {
        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
-       .scbrr_algo_id  = SCBRR_ALGO_3,
+       .sampling_rate  = 8,
        .type           = PORT_SCIFA,
 };
 
@@ -144,7 +144,7 @@ static struct plat_sci_port scif5_platform_data = {
        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
-       .scbrr_algo_id  = SCBRR_ALGO_3,
+       .sampling_rate  = 8,
        .type           = PORT_SCIFA,
 };
 
index fb0a237491477a949f9a9ec8a600c8ca497040c3..59c359469f13adb6c5d22043b747f20f7a5436c1 100644 (file)
@@ -365,7 +365,7 @@ static struct plat_sci_port scif3_platform_data = {
        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE,
-       .scbrr_algo_id  = SCBRR_ALGO_3,
+       .sampling_rate  = 8,
        .type           = PORT_SCIFA,
 };
 
@@ -388,7 +388,7 @@ static struct plat_sci_port scif4_platform_data = {
        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE,
-       .scbrr_algo_id  = SCBRR_ALGO_3,
+       .sampling_rate  = 8,
        .type           = PORT_SCIFA,
 };
 
@@ -411,7 +411,7 @@ static struct plat_sci_port scif5_platform_data = {
        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE,
-       .scbrr_algo_id  = SCBRR_ALGO_3,
+       .sampling_rate  = 8,
        .type           = PORT_SCIFA,
 };