ixgbe: PFC not cleared on X540 devices

X540 devices do not clear PFC before sets. This results in
the device possibly responding to PFC frames that the user
has disabled. Although it would also be wrong for the peer
to be transmitting these frames. Now we clear the register
before set.

Signed-off-by: John Fastabend <john.r.fastabend@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c
index ade98200288c617d812f2b3fd29ab3fb22a635bd..d64fb872978ebb14cf36ab9c5e7dd839a5e5453b 100644 (file)
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c
@@ -252,8 +252,10 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en)
                reg &= ~IXGBE_MFLCN_RFCE;
                reg |= IXGBE_MFLCN_RPFCE | IXGBE_MFLCN_DPF;
 
-               if (hw->mac.type == ixgbe_mac_X540)
+               if (hw->mac.type == ixgbe_mac_X540) {
+                       reg &= ~IXGBE_MFLCN_RPFCE_MASK;
                        reg |= pfc_en << IXGBE_MFLCN_RPFCE_SHIFT;
+               }
 
                IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg);
 

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index e0d970ebab7a26d7b5be056d0ec4eba125ae4bb7..9f618ee7d333814dcbc09738195d6ff46a0bdebb 100644 (file)
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
@@ -1834,6 +1834,7 @@ enum {
 #define IXGBE_MFLCN_DPF         0x00000002 /* Discard Pause Frame */
 #define IXGBE_MFLCN_RPFCE       0x00000004 /* Receive Priority FC Enable */
 #define IXGBE_MFLCN_RFCE        0x00000008 /* Receive FC Enable */
+#define IXGBE_MFLCN_RPFCE_MASK 0x00000FE0 /* Receive FC Mask */
 
 #define IXGBE_MFLCN_RPFCE_SHIFT                 4