--- /dev/null
+* MSM Timer
+
+Properties:
+
+- compatible : Should at least contain "qcom,msm-timer". More specific
+ properties such as "qcom,msm-gpt" and "qcom,msm-dgt" specify a general
+ purpose timer and a debug timer respectively.
+
+- interrupts : Interrupt indicating a match event.
+
+- reg : Specifies the base address of the timer registers. The second region
+ specifies an optional register used to configure the clock divider.
+
+- clock-frequency : The frequency of the timer in Hz.
+
+Optional:
+
+- cpu-offset : per-cpu offset used when the timer is accessed without the
+ CPU remapping facilities. The offset is cpu-offset * cpu-nr.
+
+Example:
+
+ timer@200a004 {
+ compatible = "qcom,msm-gpt", "qcom,msm-timer";
+ interrupts = <1 2 0x301>;
+ reg = <0x0200a004 0x10>;
+ clock-frequency = <32768>;
+ cpu-offset = <0x40000>;
+ };
+
+ timer@200a024 {
+ compatible = "qcom,msm-dgt", "qcom,msm-timer";
+ interrupts = <1 3 0x301>;
+ reg = <0x0200a024 0x10>,
+ <0x0200a034 0x4>;
+ clock-frequency = <6750000>;
+ cpu-offset = <0x40000>;
+ };
compatible = "qcom,msm8660-surf", "qcom,msm8660";
interrupt-parent = <&intc>;
- intc: interrupt-controller@02080000 {
+ intc: interrupt-controller@2080000 {
compatible = "qcom,msm-8660-qgic";
interrupt-controller;
#interrupt-cells = <3>;
< 0x02081000 0x1000 >;
};
+ timer@2000004 {
+ compatible = "qcom,msm-gpt", "qcom,msm-timer";
+ interrupts = <1 1 0x301>;
+ reg = <0x02000004 0x10>;
+ clock-frequency = <32768>;
+ cpu-offset = <0x40000>;
+ };
+
+ timer@2000024 {
+ compatible = "qcom,msm-dgt", "qcom,msm-timer";
+ interrupts = <1 0 0x301>;
+ reg = <0x02000024 0x10>,
+ <0x02000034 0x4>;
+ clock-frequency = <6750000>;
+ cpu-offset = <0x40000>;
+ };
+
serial@19c400000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x19c40000 0x1000>,
--- /dev/null
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "Qualcomm MSM8960 CDP";
+ compatible = "qcom,msm8960-cdp", "qcom,msm8960";
+ interrupt-parent = <&intc>;
+
+ intc: interrupt-controller@2000000 {
+ compatible = "qcom,msm-qgic2";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = < 0x02000000 0x1000 >,
+ < 0x02002000 0x1000 >;
+ };
+
+ timer@200a004 {
+ compatible = "qcom,msm-gpt", "qcom,msm-timer";
+ interrupts = <1 2 0x301>;
+ reg = <0x0200a004 0x10>;
+ clock-frequency = <32768>;
+ cpu-offset = <0x80000>;
+ };
+
+ timer@200a024 {
+ compatible = "qcom,msm-dgt", "qcom,msm-timer";
+ interrupts = <1 1 0x301>;
+ reg = <0x0200a024 0x10>,
+ <0x0200a034 0x4>;
+ clock-frequency = <6750000>;
+ cpu-offset = <0x80000>;
+ };
+
+ serial@19c400000 {
+ compatible = "qcom,msm-hsuart", "qcom,msm-uart";
+ reg = <0x16440000 0x1000>,
+ <0x16400000 0x1000>;
+ interrupts = <0 154 0x0>;
+ };
+};
config ARCH_MSM8X60
bool "MSM8X60"
- select MACH_MSM8X60_SURF if (!MACH_MSM8X60_RUMI3 && !MACH_MSM8X60_SIM \
- && !MACH_MSM8X60_FFA)
select ARCH_MSM_SCORPIONMP
select ARM_GIC
select CPU_V7
select GPIO_MSM_V2
select MSM_GPIOMUX
select MSM_SCM if SMP
+ select USE_OF
config ARCH_MSM8960
bool "MSM8960"
select ARCH_MSM_SCORPIONMP
- select MACH_MSM8960_SIM if (!MACH_MSM8960_RUMI3)
select ARM_GIC
select CPU_V7
select MSM_V2_TLMM
select MSM_GPIOMUX
select MSM_SCM if SMP
+ select USE_OF
endchoice
help
Support for the Qualcomm ST1.5.
-config MACH_MSM8X60_RUMI3
- depends on ARCH_MSM8X60
- bool "MSM8x60 RUMI3"
- help
- Support for the Qualcomm MSM8x60 RUMI3 emulator.
-
-config MACH_MSM8X60_SURF
- depends on ARCH_MSM8X60
- bool "MSM8x60 SURF"
- help
- Support for the Qualcomm MSM8x60 SURF eval board.
-
-config MACH_MSM8X60_SIM
- depends on ARCH_MSM8X60
- bool "MSM8x60 Simulator"
- help
- Support for the Qualcomm MSM8x60 simulator.
-
-config MACH_MSM8X60_FFA
- depends on ARCH_MSM8X60
- bool "MSM8x60 FFA"
- help
- Support for the Qualcomm MSM8x60 FFA eval board.
-
-config MACH_MSM8960_SIM
- depends on ARCH_MSM8960
- bool "MSM8960 Simulator"
- help
- Support for the Qualcomm MSM8960 simulator.
-
-config MACH_MSM8960_RUMI3
- depends on ARCH_MSM8960
- bool "MSM8960 RUMI3"
- help
- Support for the Qualcomm MSM8960 RUMI3 emulator.
-
endmenu
config MSM_SMD_PKG3
obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o
obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
-obj-$(CONFIG_ARCH_MSM8X60) += board-msm8x60.o
-obj-$(CONFIG_ARCH_MSM8960) += board-msm8960.o devices-msm8960.o
+obj-$(CONFIG_ARCH_MSM8X60) += board-dt-8660.o
+obj-$(CONFIG_ARCH_MSM8960) += board-dt-8960.o
obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o
obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o gpiomux-v1.o gpiomux.o
zreladdr-y += 0x10008000
params_phys-y := 0x10000100
initrd_phys-y := 0x10800000
+
+dtb-$(CONFIG_ARCH_MSM8X60) += msm8660-surf.dtb
+dtb-$(CONFIG_ARCH_MSM8960) += msm8960-cdp.dtb
--- /dev/null
+/* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
+
+#include <mach/board.h>
+#include "common.h"
+
+static const struct of_device_id msm_dt_gic_match[] __initconst = {
+ { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init },
+ {}
+};
+
+static void __init msm8x60_init_irq(void)
+{
+ of_irq_init(msm_dt_gic_match);
+}
+
+static void __init msm8x60_init_late(void)
+{
+ smd_debugfs_init();
+}
+
+static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
+ {}
+};
+
+static void __init msm8x60_dt_init(void)
+{
+ of_platform_populate(NULL, of_default_bus_match_table,
+ msm_auxdata_lookup, NULL);
+}
+
+static const char *msm8x60_fluid_match[] __initdata = {
+ "qcom,msm8660-fluid",
+ "qcom,msm8660-surf",
+ NULL
+};
+
+DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
+ .map_io = msm_map_msm8x60_io,
+ .init_irq = msm8x60_init_irq,
+ .handle_irq = gic_handle_irq,
+ .init_machine = msm8x60_dt_init,
+ .init_late = msm8x60_init_late,
+ .timer = &msm_dt_timer,
+ .dt_compat = msm8x60_fluid_match,
+MACHINE_END
--- /dev/null
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/hardware/gic.h>
+#include <asm/mach/arch.h>
+
+#include "common.h"
+
+static const struct of_device_id msm_dt_gic_match[] __initconst = {
+ { .compatible = "qcom,msm-qgic2", .data = gic_of_init },
+ { }
+};
+
+static void __init msm_dt_init_irq(void)
+{
+ of_irq_init(msm_dt_gic_match);
+}
+
+static void __init msm_dt_init(void)
+{
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char * const msm8960_dt_match[] __initconst = {
+ "qcom,msm8960-cdp",
+ NULL
+};
+
+DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)")
+ .map_io = msm_map_msm8960_io,
+ .init_irq = msm_dt_init_irq,
+ .timer = &msm_dt_timer,
+ .init_machine = msm_dt_init,
+ .dt_compat = msm8960_dt_match,
+ .handle_irq = gic_handle_irq,
+MACHINE_END
#include <linux/mtd/partitions.h>
#include "devices.h"
+#include "common.h"
static struct resource smc91x_resources[] = {
[0] = {
&smc91x_device,
};
-extern struct sys_timer msm_timer;
-
static void __init halibut_init_early(void)
{
arch_ioremap_caller = __msm_ioremap_caller;
.init_irq = halibut_init_irq,
.init_machine = halibut_init,
.init_late = halibut_init_late,
- .timer = &msm_timer,
+ .timer = &msm7x01_timer,
MACHINE_END
#include "devices.h"
#include "gpiomux.h"
#include "proc_comm.h"
-
-extern struct sys_timer msm_timer;
+#include "common.h"
static void __init msm7x30_fixup(struct tag *tag, char **cmdline,
struct meminfo *mi)
.init_irq = msm7x30_init_irq,
.init_machine = msm7x30_init,
.init_late = msm7x30_init_late,
- .timer = &msm_timer,
+ .timer = &msm7x30_timer,
MACHINE_END
MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
.init_irq = msm7x30_init_irq,
.init_machine = msm7x30_init,
.init_late = msm7x30_init_late,
- .timer = &msm_timer,
+ .timer = &msm7x30_timer,
MACHINE_END
MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
.init_irq = msm7x30_init_irq,
.init_machine = msm7x30_init,
.init_late = msm7x30_init_late,
- .timer = &msm_timer,
+ .timer = &msm7x30_timer,
MACHINE_END
+++ /dev/null
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- *
- */
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/clkdev.h>
-#include <linux/memblock.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/hardware/gic.h>
-#include <asm/setup.h>
-
-#include <mach/board.h>
-#include <mach/msm_iomap.h>
-
-#include "devices.h"
-
-static void __init msm8960_fixup(struct tag *tag, char **cmdline,
- struct meminfo *mi)
-{
- for (; tag->hdr.size; tag = tag_next(tag))
- if (tag->hdr.tag == ATAG_MEM &&
- tag->u.mem.start == 0x40200000) {
- tag->u.mem.start = 0x40000000;
- tag->u.mem.size += SZ_2M;
- }
-}
-
-static void __init msm8960_reserve(void)
-{
- memblock_remove(0x40000000, SZ_2M);
-}
-
-static void __init msm8960_map_io(void)
-{
- msm_map_msm8960_io();
-}
-
-static void __init msm8960_init_irq(void)
-{
- unsigned int i;
- gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
- (void *)MSM_QGIC_CPU_BASE);
-
- /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
- writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
-
- if (machine_is_msm8960_rumi3())
- writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
-
- /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
- * as they are configured as level, which does not play nice with
- * handle_percpu_irq.
- */
- for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
- if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
- irq_set_handler(i, handle_percpu_irq);
- }
-}
-
-static struct platform_device *sim_devices[] __initdata = {
- &msm8960_device_uart_gsbi2,
-};
-
-static struct platform_device *rumi3_devices[] __initdata = {
- &msm8960_device_uart_gsbi5,
-};
-
-static void __init msm8960_sim_init(void)
-{
- platform_add_devices(sim_devices, ARRAY_SIZE(sim_devices));
-}
-
-static void __init msm8960_rumi3_init(void)
-{
- platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));
-}
-
-static void __init msm8960_init_late(void)
-{
- smd_debugfs_init();
-}
-
-MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
- .fixup = msm8960_fixup,
- .reserve = msm8960_reserve,
- .map_io = msm8960_map_io,
- .init_irq = msm8960_init_irq,
- .timer = &msm_timer,
- .handle_irq = gic_handle_irq,
- .init_machine = msm8960_sim_init,
- .init_late = msm8960_init_late,
-MACHINE_END
-
-MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
- .fixup = msm8960_fixup,
- .reserve = msm8960_reserve,
- .map_io = msm8960_map_io,
- .init_irq = msm8960_init_irq,
- .timer = &msm_timer,
- .handle_irq = gic_handle_irq,
- .init_machine = msm8960_rumi3_init,
- .init_late = msm8960_init_late,
-MACHINE_END
-
+++ /dev/null
-/* Copyright (c) 2010, 2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/irqdomain.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
-#include <linux/memblock.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/hardware/gic.h>
-#include <asm/setup.h>
-
-#include <mach/board.h>
-#include <mach/msm_iomap.h>
-
-static void __init msm8x60_fixup(struct tag *tag, char **cmdline,
- struct meminfo *mi)
-{
- for (; tag->hdr.size; tag = tag_next(tag))
- if (tag->hdr.tag == ATAG_MEM &&
- tag->u.mem.start == 0x40200000) {
- tag->u.mem.start = 0x40000000;
- tag->u.mem.size += SZ_2M;
- }
-}
-
-static void __init msm8x60_reserve(void)
-{
- memblock_remove(0x40000000, SZ_2M);
-}
-
-static void __init msm8x60_map_io(void)
-{
- msm_map_msm8x60_io();
-}
-
-#ifdef CONFIG_OF
-static struct of_device_id msm_dt_gic_match[] __initdata = {
- { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init },
- {}
-};
-#endif
-
-static void __init msm8x60_init_irq(void)
-{
- if (!of_have_populated_dt())
- gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
- (void *)MSM_QGIC_CPU_BASE);
-#ifdef CONFIG_OF
- else
- of_irq_init(msm_dt_gic_match);
-#endif
-
- /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
- writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
-
- /* RUMI does not adhere to GIC spec by enabling STIs by default.
- * Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
- */
- if (!machine_is_msm8x60_sim())
- writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
-}
-
-static void __init msm8x60_init(void)
-{
-}
-
-static void __init msm8x60_init_late(void)
-{
- smd_debugfs_init();
-}
-
-#ifdef CONFIG_OF
-static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
- {}
-};
-
-static void __init msm8x60_dt_init(void)
-{
- of_platform_populate(NULL, of_default_bus_match_table,
- msm_auxdata_lookup, NULL);
-}
-
-static const char *msm8x60_fluid_match[] __initdata = {
- "qcom,msm8660-fluid",
- "qcom,msm8660-surf",
- NULL
-};
-#endif /* CONFIG_OF */
-
-MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
- .fixup = msm8x60_fixup,
- .reserve = msm8x60_reserve,
- .map_io = msm8x60_map_io,
- .init_irq = msm8x60_init_irq,
- .handle_irq = gic_handle_irq,
- .init_machine = msm8x60_init,
- .init_late = msm8x60_init_late,
- .timer = &msm_timer,
-MACHINE_END
-
-MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
- .fixup = msm8x60_fixup,
- .reserve = msm8x60_reserve,
- .map_io = msm8x60_map_io,
- .init_irq = msm8x60_init_irq,
- .handle_irq = gic_handle_irq,
- .init_machine = msm8x60_init,
- .init_late = msm8x60_init_late,
- .timer = &msm_timer,
-MACHINE_END
-
-MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
- .fixup = msm8x60_fixup,
- .reserve = msm8x60_reserve,
- .map_io = msm8x60_map_io,
- .init_irq = msm8x60_init_irq,
- .handle_irq = gic_handle_irq,
- .init_machine = msm8x60_init,
- .init_late = msm8x60_init_late,
- .timer = &msm_timer,
-MACHINE_END
-
-MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
- .fixup = msm8x60_fixup,
- .reserve = msm8x60_reserve,
- .map_io = msm8x60_map_io,
- .init_irq = msm8x60_init_irq,
- .handle_irq = gic_handle_irq,
- .init_machine = msm8x60_init,
- .init_late = msm8x60_init_late,
- .timer = &msm_timer,
-MACHINE_END
-
-#ifdef CONFIG_OF
-/* TODO: General device tree support for all MSM. */
-DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
- .map_io = msm8x60_map_io,
- .init_irq = msm8x60_init_irq,
- .init_machine = msm8x60_dt_init,
- .init_late = msm8x60_init_late,
- .timer = &msm_timer,
- .dt_compat = msm8x60_fluid_match,
-MACHINE_END
-#endif /* CONFIG_OF */
#include <mach/mmc.h>
#include "devices.h"
-
-extern struct sys_timer msm_timer;
+#include "common.h"
static const resource_size_t qsd8x50_surf_smc91x_base __initdata = 0x70000300;
static const unsigned qsd8x50_surf_smc91x_gpio __initdata = 156;
.init_irq = qsd8x50_init_irq,
.init_machine = qsd8x50_init,
.init_late = qsd8x50_init_late,
- .timer = &msm_timer,
+ .timer = &qsd8x50_timer,
MACHINE_END
MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
.init_irq = qsd8x50_init_irq,
.init_machine = qsd8x50_init,
.init_late = qsd8x50_init_late,
- .timer = &msm_timer,
+ .timer = &qsd8x50_timer,
MACHINE_END
#include "devices.h"
#include "board-trout.h"
+#include "common.h"
extern int trout_init_mmc(unsigned int);
&msm_device_i2c,
};
-extern struct sys_timer msm_timer;
-
static void __init trout_init_early(void)
{
arch_ioremap_caller = __msm_ioremap_caller;
.init_irq = trout_init_irq,
.init_machine = trout_init,
.init_late = trout_init_late,
- .timer = &msm_timer,
+ .timer = &msm7x01_timer,
MACHINE_END
--- /dev/null
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __MACH_COMMON_H
+#define __MACH_COMMON_H
+
+extern struct sys_timer msm7x01_timer;
+extern struct sys_timer msm7x30_timer;
+extern struct sys_timer msm_dt_timer;
+extern struct sys_timer qsd8x50_timer;
+
+extern void msm_map_common_io(void);
+extern void msm_map_msm7x30_io(void);
+extern void msm_map_msm8x60_io(void);
+extern void msm_map_msm8960_io(void);
+extern void msm_map_qsd8x50_io(void);
+
+extern void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
+ unsigned int mtype, void *caller);
+
+
+#endif
+++ /dev/null
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-
-#include <linux/dma-mapping.h>
-#include <mach/irqs-8960.h>
-#include <mach/board.h>
-
-#include "devices.h"
-
-#define MSM_GSBI2_PHYS 0x16100000
-#define MSM_UART2DM_PHYS (MSM_GSBI2_PHYS + 0x40000)
-
-#define MSM_GSBI5_PHYS 0x16400000
-#define MSM_UART5DM_PHYS (MSM_GSBI5_PHYS + 0x40000)
-
-static struct resource resources_uart_gsbi2[] = {
- {
- .start = GSBI2_UARTDM_IRQ,
- .end = GSBI2_UARTDM_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = MSM_UART2DM_PHYS,
- .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
- .name = "uart_resource",
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MSM_GSBI2_PHYS,
- .end = MSM_GSBI2_PHYS + PAGE_SIZE - 1,
- .name = "gsbi_resource",
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device msm8960_device_uart_gsbi2 = {
- .name = "msm_serial",
- .id = 0,
- .num_resources = ARRAY_SIZE(resources_uart_gsbi2),
- .resource = resources_uart_gsbi2,
-};
-
-static struct resource resources_uart_gsbi5[] = {
- {
- .start = GSBI5_UARTDM_IRQ,
- .end = GSBI5_UARTDM_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = MSM_UART5DM_PHYS,
- .end = MSM_UART5DM_PHYS + PAGE_SIZE - 1,
- .name = "uart_resource",
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MSM_GSBI5_PHYS,
- .end = MSM_GSBI5_PHYS + PAGE_SIZE - 1,
- .name = "gsbi_resource",
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device msm8960_device_uart_gsbi5 = {
- .name = "msm_serial",
- .id = 0,
- .num_resources = ARRAY_SIZE(resources_uart_gsbi5),
- .resource = resources_uart_gsbi5,
-};
struct clk_lookup;
-extern struct sys_timer msm_timer;
-
/* common init routines for use by arch/arm/mach-msm/board-*.c */
void __init msm_add_devices(void);
-void __init msm_map_common_io(void);
void __init msm_init_irq(void);
void __init msm_init_gpio(void);
void __init msm_clock_init(struct clk_lookup *clock_tbl, unsigned num_clocks);
#define MSM_AD5_PHYS 0xAC000000
#define MSM_AD5_SIZE (SZ_1M*13)
-#ifndef __ASSEMBLY__
-
-extern void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
- unsigned int mtype, void *caller);
-
-#endif
-
#endif
#define MSM_HSUSB_PHYS 0xA3600000
#define MSM_HSUSB_SIZE SZ_1K
-#ifndef __ASSEMBLY__
-extern void msm_map_msm7x30_io(void);
-#endif
-
#endif
#define MSM_DEBUG_UART_PHYS 0x16440000
#endif
-#ifndef __ASSEMBLY__
-extern void msm_map_msm8960_io(void);
-#endif
-
#endif
#define MSM_SDC4_PHYS 0xA0600000
#define MSM_SDC4_SIZE SZ_4K
-#ifndef __ASSEMBLY__
-extern void msm_map_qsd8x50_io(void);
-#endif
-
#endif
#define MSM_DEBUG_UART_PHYS 0x19C40000
#endif
-#ifndef __ASSEMBLY__
-extern void msm_map_msm8x60_io(void);
-#endif
-
#endif
#include <mach/board.h>
+#include "common.h"
+
#define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \
.virtual = (unsigned long) MSM_##name##_BASE, \
.pfn = __phys_to_pfn(chip##_##name##_PHYS), \
#include <asm/mach-types.h>
#include <asm/smp_plat.h>
-#include <mach/msm_iomap.h>
-
#include "scm-boot.h"
#define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0
#define SCSS_CPU1CORE_RESET 0xD80
#define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64
-/* Mask for edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
-#define GIC_PPI_EDGE_MASK 0xFFFFD7FF
-
extern void msm_secondary_startup(void);
/*
* control for which core is the next to come out of the secondary
void __cpuinit platform_secondary_init(unsigned int cpu)
{
- /* Configure edge-triggered PPIs */
- writel(GIC_PPI_EDGE_MASK, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
-
/*
* if any interrupts are already enabled for the primary
* core (e.g. timer irq), then they will not have been enabled
/*
*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#include <asm/mach/time.h>
#include <asm/hardware/gic.h>
#include <asm/localtimer.h>
#include <asm/sched_clock.h>
-#include <mach/msm_iomap.h>
-#include <mach/cpu.h>
-#include <mach/board.h>
+#include "common.h"
#define TIMER_MATCH_VAL 0x0000
#define TIMER_COUNT_VAL 0x0004
#define TIMER_ENABLE_CLR_ON_MATCH_EN BIT(1)
#define TIMER_ENABLE_EN BIT(0)
#define TIMER_CLEAR 0x000C
-#define DGT_CLK_CTL 0x0034
#define DGT_CLK_CTL_DIV_4 0x3
#define GPT_HZ 32768
*__this_cpu_ptr(msm_evt.percpu_evt) = evt;
clockevents_register_device(evt);
- enable_percpu_irq(evt->irq, 0);
+ enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING);
return 0;
}
return msm_clocksource.read(&msm_clocksource);
}
-static void __init msm_timer_init(void)
+static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq,
+ bool percpu)
{
struct clock_event_device *ce = &msm_clockevent;
struct clocksource *cs = &msm_clocksource;
int res;
- u32 dgt_hz;
-
- if (cpu_is_msm7x01()) {
- event_base = MSM_CSR_BASE;
- source_base = MSM_CSR_BASE + 0x10;
- dgt_hz = 19200000 >> MSM_DGT_SHIFT; /* 600 KHz */
- cs->read = msm_read_timer_count_shift;
- cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT));
- } else if (cpu_is_msm7x30()) {
- event_base = MSM_CSR_BASE + 0x04;
- source_base = MSM_CSR_BASE + 0x24;
- dgt_hz = 24576000 / 4;
- } else if (cpu_is_qsd8x50()) {
- event_base = MSM_CSR_BASE;
- source_base = MSM_CSR_BASE + 0x10;
- dgt_hz = 19200000 / 4;
- } else if (cpu_is_msm8x60() || cpu_is_msm8960()) {
- event_base = MSM_TMR_BASE + 0x04;
- /* Use CPU0's timer as the global clock source. */
- source_base = MSM_TMR0_BASE + 0x24;
- dgt_hz = 27000000 / 4;
- writel_relaxed(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
- } else
- BUG();
writel_relaxed(0, event_base + TIMER_ENABLE);
writel_relaxed(0, event_base + TIMER_CLEAR);
writel_relaxed(~0, event_base + TIMER_MATCH_VAL);
ce->cpumask = cpumask_of(0);
+ ce->irq = irq;
- ce->irq = INT_GP_TIMER_EXP;
clockevents_config_and_register(ce, GPT_HZ, 4, 0xffffffff);
- if (cpu_is_msm8x60() || cpu_is_msm8960()) {
+ if (percpu) {
msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *);
if (!msm_evt.percpu_evt) {
pr_err("memory allocation failed for %s\n", ce->name);
res = request_percpu_irq(ce->irq, msm_timer_interrupt,
ce->name, msm_evt.percpu_evt);
if (!res) {
- enable_percpu_irq(ce->irq, 0);
+ enable_percpu_irq(ce->irq, IRQ_TYPE_EDGE_RISING);
#ifdef CONFIG_LOCAL_TIMERS
local_timer_register(&msm_local_timer_ops);
#endif
res = clocksource_register_hz(cs, dgt_hz);
if (res)
pr_err("clocksource_register failed\n");
- setup_sched_clock(msm_sched_clock_read,
- cpu_is_msm7x01() ? 32 - MSM_DGT_SHIFT : 32, dgt_hz);
+ setup_sched_clock(msm_sched_clock_read, sched_bits, dgt_hz);
}
-struct sys_timer msm_timer = {
- .init = msm_timer_init
+#ifdef CONFIG_OF
+static const struct of_device_id msm_dgt_match[] __initconst = {
+ { .compatible = "qcom,msm-dgt" },
+ { },
+};
+
+static const struct of_device_id msm_gpt_match[] __initconst = {
+ { .compatible = "qcom,msm-gpt" },
+ { },
+};
+
+static void __init msm_dt_timer_init(void)
+{
+ struct device_node *np;
+ u32 freq;
+ int irq;
+ struct resource res;
+ u32 percpu_offset;
+ void __iomem *dgt_clk_ctl;
+
+ np = of_find_matching_node(NULL, msm_gpt_match);
+ if (!np) {
+ pr_err("Can't find GPT DT node\n");
+ return;
+ }
+
+ event_base = of_iomap(np, 0);
+ if (!event_base) {
+ pr_err("Failed to map event base\n");
+ return;
+ }
+
+ irq = irq_of_parse_and_map(np, 0);
+ if (irq <= 0) {
+ pr_err("Can't get irq\n");
+ return;
+ }
+ of_node_put(np);
+
+ np = of_find_matching_node(NULL, msm_dgt_match);
+ if (!np) {
+ pr_err("Can't find DGT DT node\n");
+ return;
+ }
+
+ if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
+ percpu_offset = 0;
+
+ if (of_address_to_resource(np, 0, &res)) {
+ pr_err("Failed to parse DGT resource\n");
+ return;
+ }
+
+ source_base = ioremap(res.start + percpu_offset, resource_size(&res));
+ if (!source_base) {
+ pr_err("Failed to map source base\n");
+ return;
+ }
+
+ if (!of_address_to_resource(np, 1, &res)) {
+ dgt_clk_ctl = ioremap(res.start + percpu_offset,
+ resource_size(&res));
+ if (!dgt_clk_ctl) {
+ pr_err("Failed to map DGT control base\n");
+ return;
+ }
+ writel_relaxed(DGT_CLK_CTL_DIV_4, dgt_clk_ctl);
+ iounmap(dgt_clk_ctl);
+ }
+
+ if (of_property_read_u32(np, "clock-frequency", &freq)) {
+ pr_err("Unknown frequency\n");
+ return;
+ }
+ of_node_put(np);
+
+ msm_timer_init(freq, 32, irq, !!percpu_offset);
+}
+
+struct sys_timer msm_dt_timer = {
+ .init = msm_dt_timer_init
+};
+#endif
+
+static int __init msm_timer_map(phys_addr_t event, phys_addr_t source)
+{
+ event_base = ioremap(event, SZ_64);
+ if (!event_base) {
+ pr_err("Failed to map event base\n");
+ return 1;
+ }
+ source_base = ioremap(source, SZ_64);
+ if (!source_base) {
+ pr_err("Failed to map source base\n");
+ return 1;
+ }
+ return 0;
+}
+
+static void __init msm7x01_timer_init(void)
+{
+ struct clocksource *cs = &msm_clocksource;
+
+ if (msm_timer_map(0xc0100000, 0xc0100010))
+ return;
+ cs->read = msm_read_timer_count_shift;
+ cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT));
+ /* 600 KHz */
+ msm_timer_init(19200000 >> MSM_DGT_SHIFT, 32 - MSM_DGT_SHIFT, 7,
+ false);
+}
+
+struct sys_timer msm7x01_timer = {
+ .init = msm7x01_timer_init
+};
+
+static void __init msm7x30_timer_init(void)
+{
+ if (msm_timer_map(0xc0100004, 0xc0100024))
+ return;
+ msm_timer_init(24576000 / 4, 32, 1, false);
+}
+
+struct sys_timer msm7x30_timer = {
+ .init = msm7x30_timer_init
+};
+
+static void __init qsd8x50_timer_init(void)
+{
+ if (msm_timer_map(0xAC100000, 0xAC100010))
+ return;
+ msm_timer_init(19200000 / 4, 32, 7, false);
+}
+
+struct sys_timer qsd8x50_timer = {
+ .init = qsd8x50_timer_init
};
projects / ~andy / linux / commitdiff