- interrupts: the interrupt outputs of the controller
- #gpio-cells: number of cells to describe a GPIO
- gpio-controller: mark the device as a GPIO controller
-- regulators: list of regulators provided by this controller, must have
- property "regulator-compatible" to match their hardware counterparts:
- sm[0-2], ldo[0-9] and ldo_rtc
-- sm0-supply: The input supply for the SM0.
-- sm1-supply: The input supply for the SM1.
-- sm2-supply: The input supply for the SM2.
+- regulators: A node that houses a sub-node for each regulator within the
+ device. Each sub-node is identified using the node's name (or the deprecated
+ regulator-compatible property if present), with valid values listed below.
+ The content of each sub-node is defined by the standard binding for
+ regulators; see regulator.txt.
+ sys, sm[0-2], ldo[0-9] and ldo_rtc
+- sys-supply: The input supply for SYS.
+- vin-sm0-supply: The input supply for the SM0.
+- vin-sm1-supply: The input supply for the SM1.
+- vin-sm2-supply: The input supply for the SM2.
- vinldo01-supply: The input supply for the LDO1 and LDO2
- vinldo23-supply: The input supply for the LDO2 and LDO3
- vinldo4-supply: The input supply for the LDO4
- vinldo678-supply: The input supply for the LDO6, LDO7 and LDO8
- vinldo9-supply: The input supply for the LDO9
+ Optional properties:
+ - ti,system-power-controller: Telling whether or not this pmic is controlling
+ the system power.
+
Each regulator is defined using the standard binding for regulators.
+Note: LDO5 and LDO_RTC is supplied by SYS regulator internally and driver
+ take care of making proper parent child relationship.
+
Example:
pmu: tps6586x@34 {
#gpio-cells = <2>;
gpio-controller;
- sm0-supply = <&some_reg>;
- sm1-supply = <&some_reg>;
- sm2-supply = <&some_reg>;
+ ti,system-power-controller;
+
+ sys-supply = <&some_reg>;
+ vin-sm0-supply = <&some_reg>;
+ vin-sm1-supply = <&some_reg>;
+ vin-sm2-supply = <&some_reg>;
vinldo01-supply = <...>;
vinldo23-supply = <...>;
vinldo4-supply = <...>;
vinldo9-supply = <...>;
regulators {
- #address-cells = <1>;
- #size-cells = <0>;
+ sys_reg: sys {
+ regulator-name = "vdd_sys";
+ regulator-boot-on;
+ regulator-always-on;
+ };
- sm0_reg: regulator@0 {
- reg = <0>;
- regulator-compatible = "sm0";
+ sm0_reg: sm0 {
regulator-min-microvolt = < 725000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
- sm1_reg: regulator@1 {
- reg = <1>;
- regulator-compatible = "sm1";
+ sm1_reg: sm1 {
regulator-min-microvolt = < 725000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
- sm2_reg: regulator@2 {
- reg = <2>;
- regulator-compatible = "sm2";
+ sm2_reg: sm2 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <4550000>;
regulator-boot-on;
regulator-always-on;
};
- ldo0_reg: regulator@3 {
- reg = <3>;
- regulator-compatible = "ldo0";
+ ldo0_reg: ldo0 {
regulator-name = "PCIE CLK";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
- ldo1_reg: regulator@4 {
- reg = <4>;
- regulator-compatible = "ldo1";
+ ldo1_reg: ldo1 {
regulator-min-microvolt = < 725000>;
regulator-max-microvolt = <1500000>;
};
- ldo2_reg: regulator@5 {
- reg = <5>;
- regulator-compatible = "ldo2";
+ ldo2_reg: ldo2 {
regulator-min-microvolt = < 725000>;
regulator-max-microvolt = <1500000>;
};
- ldo3_reg: regulator@6 {
- reg = <6>;
- regulator-compatible = "ldo3";
+ ldo3_reg: ldo3 {
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <3300000>;
};
- ldo4_reg: regulator@7 {
- reg = <7>;
- regulator-compatible = "ldo4";
+ ldo4_reg: ldo4 {
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <2475000>;
};
- ldo5_reg: regulator@8 {
- reg = <8>;
- regulator-compatible = "ldo5";
+ ldo5_reg: ldo5 {
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <3300000>;
};
- ldo6_reg: regulator@9 {
- reg = <9>;
- regulator-compatible = "ldo6";
+ ldo6_reg: ldo6 {
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <3300000>;
};
- ldo7_reg: regulator@10 {
- reg = <10>;
- regulator-compatible = "ldo7";
+ ldo7_reg: ldo7 {
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <3300000>;
};
- ldo8_reg: regulator@11 {
- reg = <11>;
- regulator-compatible = "ldo8";
+ ldo8_reg: ldo8 {
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <3300000>;
};
- ldo9_reg: regulator@12 {
- reg = <12>;
- regulator-compatible = "ldo9";
+ ldo9_reg: ldo9 {
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <3300000>;
};
dma-apbh@00110000 {
compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x00110000 0x2000>;
+ clocks = <&clks 106>;
};
gpmi-nand@00112000 {
- compatible = "fsl,imx6q-gpmi-nand";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
- reg-names = "gpmi-nand", "bch";
- interrupts = <0 13 0x04>, <0 15 0x04>;
- interrupt-names = "gpmi-dma", "bch";
- fsl,gpmi-dma-channel = <0>;
- status = "disabled";
+ compatible = "fsl,imx6q-gpmi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
+ reg-names = "gpmi-nand", "bch";
+ interrupts = <0 13 0x04>, <0 15 0x04>;
+ interrupt-names = "gpmi-dma", "bch";
+ clocks = <&clks 152>, <&clks 153>, <&clks 151>,
+ <&clks 150>, <&clks 149>;
+ clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
+ "gpmi_bch_apb", "per1_bch";
+ fsl,gpmi-dma-channel = <0>;
+ status = "disabled";
};
timer@00a00600 {
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02008000 0x4000>;
interrupts = <0 31 0x04>;
+ clocks = <&clks 112>, <&clks 112>;
+ clock-names = "ipg", "per";
status = "disabled";
};
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x0200c000 0x4000>;
interrupts = <0 32 0x04>;
+ clocks = <&clks 113>, <&clks 113>;
+ clock-names = "ipg", "per";
status = "disabled";
};
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02010000 0x4000>;
interrupts = <0 33 0x04>;
+ clocks = <&clks 114>, <&clks 114>;
+ clock-names = "ipg", "per";
status = "disabled";
};
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02014000 0x4000>;
interrupts = <0 34 0x04>;
+ clocks = <&clks 115>, <&clks 115>;
+ clock-names = "ipg", "per";
status = "disabled";
};
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02018000 0x4000>;
interrupts = <0 35 0x04>;
+ clocks = <&clks 116>, <&clks 116>;
+ clock-names = "ipg", "per";
status = "disabled";
};
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x4000>;
interrupts = <0 26 0x04>;
+ clocks = <&clks 160>, <&clks 161>;
+ clock-names = "ipg", "per";
status = "disabled";
};
compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
reg = <0x02028000 0x4000>;
interrupts = <0 46 0x04>;
+ clocks = <&clks 178>;
fsl,fifo-depth = <15>;
fsl,ssi-dma-events = <38 37>;
status = "disabled";
compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
reg = <0x0202c000 0x4000>;
interrupts = <0 47 0x04>;
+ clocks = <&clks 179>;
fsl,fifo-depth = <15>;
fsl,ssi-dma-events = <42 41>;
status = "disabled";
compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
reg = <0x02030000 0x4000>;
interrupts = <0 48 0x04>;
+ clocks = <&clks 180>;
fsl,fifo-depth = <15>;
fsl,ssi-dma-events = <46 45>;
status = "disabled";
compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
reg = <0x020bc000 0x4000>;
interrupts = <0 80 0x04>;
- status = "disabled";
+ clocks = <&clks 0>;
};
wdog@020c0000 { /* WDOG2 */
compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
reg = <0x020c0000 0x4000>;
interrupts = <0 81 0x04>;
+ clocks = <&clks 0>;
status = "disabled";
};
- ccm@020c4000 {
+ clks: ccm@020c4000 {
compatible = "fsl,imx6q-ccm";
reg = <0x020c4000 0x4000>;
interrupts = <0 87 0x04 0 88 0x04>;
+ #clock-cells = <1>;
};
- anatop@020c8000 {
- compatible = "fsl,imx6q-anatop";
+ anatop: anatop@020c8000 {
+ compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
reg = <0x020c8000 0x1000>;
interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>;
interrupts = <0 44 0x04>;
+ clocks = <&clks 182>;
};
usbphy2: usbphy@020ca000 {
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x020ca000 0x1000>;
interrupts = <0 45 0x04>;
+ clocks = <&clks 183>;
};
snvs@020cc000 {
interrupts = <0 89 0x04 0 90 0x04>;
};
+ gpr: iomuxc-gpr@020e0000 {
+ compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
+ reg = <0x020e0000 0x38>;
+ };
+
iomuxc@020e0000 {
compatible = "fsl,imx6q-iomuxc";
reg = <0x020e0000 0x4000>;
/* shared pinctrl settings */
audmux {
pinctrl_audmux_1: audmux-1 {
- fsl,pins = <18 0x80000000 /* MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD */
- 1586 0x80000000 /* MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC */
- 11 0x80000000 /* MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD */
- 3 0x80000000>; /* MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS */
+ fsl,pins = <
+ 18 0x80000000 /* MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD */
+ 1586 0x80000000 /* MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC */
+ 11 0x80000000 /* MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD */
+ 3 0x80000000 /* MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS */
+ >;
+ };
+ };
+
+ ecspi1 {
+ pinctrl_ecspi1_1: ecspi1grp-1 {
+ fsl,pins = <
+ 101 0x100b1 /* MX6Q_PAD_EIM_D17__ECSPI1_MISO */
+ 109 0x100b1 /* MX6Q_PAD_EIM_D18__ECSPI1_MOSI */
+ 94 0x100b1 /* MX6Q_PAD_EIM_D16__ECSPI1_SCLK */
+ >;
+ };
+ };
+
+ enet {
+ pinctrl_enet_1: enetgrp-1 {
+ fsl,pins = <
+ 695 0x1b0b0 /* MX6Q_PAD_ENET_MDIO__ENET_MDIO */
+ 756 0x1b0b0 /* MX6Q_PAD_ENET_MDC__ENET_MDC */
+ 24 0x1b0b0 /* MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC */
+ 30 0x1b0b0 /* MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0 */
+ 34 0x1b0b0 /* MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1 */
+ 39 0x1b0b0 /* MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2 */
+ 44 0x1b0b0 /* MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3 */
+ 56 0x1b0b0 /* MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL */
+ 702 0x1b0b0 /* MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK */
+ 74 0x1b0b0 /* MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC */
+ 52 0x1b0b0 /* MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 */
+ 61 0x1b0b0 /* MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 */
+ 66 0x1b0b0 /* MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 */
+ 70 0x1b0b0 /* MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 */
+ 48 0x1b0b0 /* MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL */
+ >;
+ };
+
+ pinctrl_enet_2: enetgrp-2 {
+ fsl,pins = <
+ 890 0x1b0b0 /* MX6Q_PAD_KEY_COL1__ENET_MDIO */
+ 909 0x1b0b0 /* MX6Q_PAD_KEY_COL2__ENET_MDC */
+ 24 0x1b0b0 /* MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC */
+ 30 0x1b0b0 /* MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0 */
+ 34 0x1b0b0 /* MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1 */
+ 39 0x1b0b0 /* MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2 */
+ 44 0x1b0b0 /* MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3 */
+ 56 0x1b0b0 /* MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL */
+ 702 0x1b0b0 /* MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK */
+ 74 0x1b0b0 /* MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC */
+ 52 0x1b0b0 /* MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 */
+ 61 0x1b0b0 /* MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 */
+ 66 0x1b0b0 /* MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 */
+ 70 0x1b0b0 /* MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 */
+ 48 0x1b0b0 /* MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL */
+ >;
};
};
gpmi-nand {
pinctrl_gpmi_nand_1: gpmi-nand-1 {
- fsl,pins = <1328 0xb0b1 /* MX6Q_PAD_NANDF_CLE__RAWNAND_CLE */
- 1336 0xb0b1 /* MX6Q_PAD_NANDF_ALE__RAWNAND_ALE */
- 1344 0xb0b1 /* MX6Q_PAD_NANDF_WP_B__RAWNAND_RESETN */
- 1352 0xb000 /* MX6Q_PAD_NANDF_RB0__RAWNAND_READY0 */
- 1360 0xb0b1 /* MX6Q_PAD_NANDF_CS0__RAWNAND_CE0N */
- 1365 0xb0b1 /* MX6Q_PAD_NANDF_CS1__RAWNAND_CE1N */
- 1371 0xb0b1 /* MX6Q_PAD_NANDF_CS2__RAWNAND_CE2N */
- 1378 0xb0b1 /* MX6Q_PAD_NANDF_CS3__RAWNAND_CE3N */
- 1387 0xb0b1 /* MX6Q_PAD_SD4_CMD__RAWNAND_RDN */
- 1393 0xb0b1 /* MX6Q_PAD_SD4_CLK__RAWNAND_WRN */
- 1397 0xb0b1 /* MX6Q_PAD_NANDF_D0__RAWNAND_D0 */
- 1405 0xb0b1 /* MX6Q_PAD_NANDF_D1__RAWNAND_D1 */
- 1413 0xb0b1 /* MX6Q_PAD_NANDF_D2__RAWNAND_D2 */
- 1421 0xb0b1 /* MX6Q_PAD_NANDF_D3__RAWNAND_D3 */
- 1429 0xb0b1 /* MX6Q_PAD_NANDF_D4__RAWNAND_D4 */
- 1437 0xb0b1 /* MX6Q_PAD_NANDF_D5__RAWNAND_D5 */
- 1445 0xb0b1 /* MX6Q_PAD_NANDF_D6__RAWNAND_D6 */
- 1453 0xb0b1 /* MX6Q_PAD_NANDF_D7__RAWNAND_D7 */
- 1463 0x00b1>; /* MX6Q_PAD_SD4_DAT0__RAWNAND_DQS */
+ fsl,pins = <
+ 1328 0xb0b1 /* MX6Q_PAD_NANDF_CLE__RAWNAND_CLE */
+ 1336 0xb0b1 /* MX6Q_PAD_NANDF_ALE__RAWNAND_ALE */
+ 1344 0xb0b1 /* MX6Q_PAD_NANDF_WP_B__RAWNAND_RESETN */
+ 1352 0xb000 /* MX6Q_PAD_NANDF_RB0__RAWNAND_READY0 */
+ 1360 0xb0b1 /* MX6Q_PAD_NANDF_CS0__RAWNAND_CE0N */
+ 1365 0xb0b1 /* MX6Q_PAD_NANDF_CS1__RAWNAND_CE1N */
+ 1371 0xb0b1 /* MX6Q_PAD_NANDF_CS2__RAWNAND_CE2N */
+ 1378 0xb0b1 /* MX6Q_PAD_NANDF_CS3__RAWNAND_CE3N */
+ 1387 0xb0b1 /* MX6Q_PAD_SD4_CMD__RAWNAND_RDN */
+ 1393 0xb0b1 /* MX6Q_PAD_SD4_CLK__RAWNAND_WRN */
+ 1397 0xb0b1 /* MX6Q_PAD_NANDF_D0__RAWNAND_D0 */
+ 1405 0xb0b1 /* MX6Q_PAD_NANDF_D1__RAWNAND_D1 */
+ 1413 0xb0b1 /* MX6Q_PAD_NANDF_D2__RAWNAND_D2 */
+ 1421 0xb0b1 /* MX6Q_PAD_NANDF_D3__RAWNAND_D3 */
+ 1429 0xb0b1 /* MX6Q_PAD_NANDF_D4__RAWNAND_D4 */
+ 1437 0xb0b1 /* MX6Q_PAD_NANDF_D5__RAWNAND_D5 */
+ 1445 0xb0b1 /* MX6Q_PAD_NANDF_D6__RAWNAND_D6 */
+ 1453 0xb0b1 /* MX6Q_PAD_NANDF_D7__RAWNAND_D7 */
+ 1463 0x00b1 /* MX6Q_PAD_SD4_DAT0__RAWNAND_DQS */
+ >;
};
};
i2c1 {
pinctrl_i2c1_1: i2c1grp-1 {
- fsl,pins = <137 0x4001b8b1 /* MX6Q_PAD_EIM_D21__I2C1_SCL */
- 196 0x4001b8b1>; /* MX6Q_PAD_EIM_D28__I2C1_SDA */
+ fsl,pins = <
+ 137 0x4001b8b1 /* MX6Q_PAD_EIM_D21__I2C1_SCL */
+ 196 0x4001b8b1 /* MX6Q_PAD_EIM_D28__I2C1_SDA */
+ >;
+ };
+ };
+
+ uart1 {
+ pinctrl_uart1_1: uart1grp-1 {
+ fsl,pins = <
+ 1140 0x1b0b1 /* MX6Q_PAD_CSI0_DAT10__UART1_TXD */
+ 1148 0x1b0b1 /* MX6Q_PAD_CSI0_DAT11__UART1_RXD */
+ >;
};
};
- serial2 {
- pinctrl_serial2_1: serial2grp-1 {
- fsl,pins = <183 0x1b0b1 /* MX6Q_PAD_EIM_D26__UART2_TXD */
- 191 0x1b0b1>; /* MX6Q_PAD_EIM_D27__UART2_RXD */
+ uart2 {
+ pinctrl_uart2_1: uart2grp-1 {
+ fsl,pins = <
+ 183 0x1b0b1 /* MX6Q_PAD_EIM_D26__UART2_TXD */
+ 191 0x1b0b1 /* MX6Q_PAD_EIM_D27__UART2_RXD */
+ >;
+ };
+ };
+
+ uart4 {
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ 877 0x1b0b1 /* MX6Q_PAD_KEY_COL0__UART4_TXD */
+ 885 0x1b0b1 /* MX6Q_PAD_KEY_ROW0__UART4_RXD */
+ >;
+ };
+ };
+
+ usbotg {
+ pinctrl_usbotg_1: usbotggrp-1 {
+ fsl,pins = <
+ 1592 0x17059 /* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */
+ >;
+ };
+ };
+
+ usdhc2 {
+ pinctrl_usdhc2_1: usdhc2grp-1 {
+ fsl,pins = <
+ 1577 0x17059 /* MX6Q_PAD_SD2_CMD__USDHC2_CMD */
+ 1569 0x10059 /* MX6Q_PAD_SD2_CLK__USDHC2_CLK */
+ 16 0x17059 /* MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 */
+ 0 0x17059 /* MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 */
+ 8 0x17059 /* MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 */
+ 1583 0x17059 /* MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 */
+ 1430 0x17059 /* MX6Q_PAD_NANDF_D4__USDHC2_DAT4 */
+ 1438 0x17059 /* MX6Q_PAD_NANDF_D5__USDHC2_DAT5 */
+ 1446 0x17059 /* MX6Q_PAD_NANDF_D6__USDHC2_DAT6 */
+ 1454 0x17059 /* MX6Q_PAD_NANDF_D7__USDHC2_DAT7 */
+ >;
};
};
usdhc3 {
pinctrl_usdhc3_1: usdhc3grp-1 {
- fsl,pins = <1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */
- 1281 0x10059 /* MX6Q_PAD_SD3_CLK__USDHC3_CLK */
- 1289 0x17059 /* MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 */
- 1297 0x17059 /* MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 */
- 1305 0x17059 /* MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 */
- 1312 0x17059 /* MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 */
- 1265 0x17059 /* MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 */
- 1257 0x17059 /* MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 */
- 1249 0x17059 /* MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 */
- 1241 0x17059>; /* MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 */
+ fsl,pins = <
+ 1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */
+ 1281 0x10059 /* MX6Q_PAD_SD3_CLK__USDHC3_CLK */
+ 1289 0x17059 /* MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 */
+ 1297 0x17059 /* MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 */
+ 1305 0x17059 /* MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 */
+ 1312 0x17059 /* MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 */
+ 1265 0x17059 /* MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 */
+ 1257 0x17059 /* MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 */
+ 1249 0x17059 /* MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 */
+ 1241 0x17059 /* MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 */
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ 1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */
+ 1281 0x10059 /* MX6Q_PAD_SD3_CLK__USDHC3_CLK */
+ 1289 0x17059 /* MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 */
+ 1297 0x17059 /* MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 */
+ 1305 0x17059 /* MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 */
+ 1312 0x17059 /* MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 */
+ >;
};
};
usdhc4 {
pinctrl_usdhc4_1: usdhc4grp-1 {
- fsl,pins = <1386 0x17059 /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */
- 1392 0x10059 /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */
- 1462 0x17059 /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */
- 1470 0x17059 /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */
- 1478 0x17059 /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */
- 1486 0x17059 /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */
- 1493 0x17059 /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */
- 1501 0x17059 /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */
- 1509 0x17059 /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */
- 1517 0x17059>; /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
+ fsl,pins = <
+ 1386 0x17059 /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */
+ 1392 0x10059 /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */
+ 1462 0x17059 /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */
+ 1470 0x17059 /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */
+ 1478 0x17059 /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */
+ 1486 0x17059 /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */
+ 1493 0x17059 /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */
+ 1501 0x17059 /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */
+ 1509 0x17059 /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */
+ 1517 0x17059 /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
+ >;
};
- };
- ecspi1 {
- pinctrl_ecspi1_1: ecspi1grp-1 {
- fsl,pins = <101 0x100b1 /* MX6Q_PAD_EIM_D17__ECSPI1_MISO */
- 109 0x100b1 /* MX6Q_PAD_EIM_D18__ECSPI1_MOSI */
- 94 0x100b1>; /* MX6Q_PAD_EIM_D16__ECSPI1_SCLK */
+ pinctrl_usdhc4_2: usdhc4grp-2 {
+ fsl,pins = <
+ 1386 0x17059 /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */
+ 1392 0x10059 /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */
+ 1462 0x17059 /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */
+ 1470 0x17059 /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */
+ 1478 0x17059 /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */
+ 1486 0x17059 /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */
+ >;
};
};
};
compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
reg = <0x020ec000 0x4000>;
interrupts = <0 2 0x04>;
+ clocks = <&clks 155>, <&clks 155>;
+ clock-names = "ipg", "ahb";
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q-to1.bin";
};
};
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
reg = <0x02184000 0x200>;
interrupts = <0 43 0x04>;
+ clocks = <&clks 162>;
fsl,usbphy = <&usbphy1>;
+ fsl,usbmisc = <&usbmisc 0>;
status = "disabled";
};
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
reg = <0x02184200 0x200>;
interrupts = <0 40 0x04>;
+ clocks = <&clks 162>;
fsl,usbphy = <&usbphy2>;
+ fsl,usbmisc = <&usbmisc 1>;
status = "disabled";
};
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
reg = <0x02184400 0x200>;
interrupts = <0 41 0x04>;
+ clocks = <&clks 162>;
+ fsl,usbmisc = <&usbmisc 2>;
status = "disabled";
};
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
reg = <0x02184600 0x200>;
interrupts = <0 42 0x04>;
+ clocks = <&clks 162>;
+ fsl,usbmisc = <&usbmisc 3>;
status = "disabled";
};
+ usbmisc: usbmisc@02184800 {
+ #index-cells = <1>;
+ compatible = "fsl,imx6q-usbmisc";
+ reg = <0x02184800 0x200>;
+ clocks = <&clks 162>;
+ };
+
ethernet@02188000 {
compatible = "fsl,imx6q-fec";
reg = <0x02188000 0x4000>;
interrupts = <0 118 0x04 0 119 0x04>;
+ clocks = <&clks 117>, <&clks 117>;
+ clock-names = "ipg", "ahb";
status = "disabled";
};
compatible = "fsl,imx6q-usdhc";
reg = <0x02190000 0x4000>;
interrupts = <0 22 0x04>;
+ clocks = <&clks 163>, <&clks 163>, <&clks 163>;
+ clock-names = "ipg", "ahb", "per";
status = "disabled";
};
compatible = "fsl,imx6q-usdhc";
reg = <0x02194000 0x4000>;
interrupts = <0 23 0x04>;
+ clocks = <&clks 164>, <&clks 164>, <&clks 164>;
+ clock-names = "ipg", "ahb", "per";
status = "disabled";
};
compatible = "fsl,imx6q-usdhc";
reg = <0x02198000 0x4000>;
interrupts = <0 24 0x04>;
+ clocks = <&clks 165>, <&clks 165>, <&clks 165>;
+ clock-names = "ipg", "ahb", "per";
status = "disabled";
};
compatible = "fsl,imx6q-usdhc";
reg = <0x0219c000 0x4000>;
interrupts = <0 25 0x04>;
+ clocks = <&clks 166>, <&clks 166>, <&clks 166>;
+ clock-names = "ipg", "ahb", "per";
status = "disabled";
};
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
reg = <0x021a0000 0x4000>;
interrupts = <0 36 0x04>;
+ clocks = <&clks 125>;
status = "disabled";
};
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
reg = <0x021a4000 0x4000>;
interrupts = <0 37 0x04>;
+ clocks = <&clks 126>;
status = "disabled";
};
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
reg = <0x021a8000 0x4000>;
interrupts = <0 38 0x04>;
+ clocks = <&clks 127>;
status = "disabled";
};
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021e8000 0x4000>;
interrupts = <0 27 0x04>;
+ clocks = <&clks 160>, <&clks 161>;
+ clock-names = "ipg", "per";
status = "disabled";
};
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021ec000 0x4000>;
interrupts = <0 28 0x04>;
+ clocks = <&clks 160>, <&clks 161>;
+ clock-names = "ipg", "per";
status = "disabled";
};
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f0000 0x4000>;
interrupts = <0 29 0x04>;
+ clocks = <&clks 160>, <&clks 161>;
+ clock-names = "ipg", "per";
status = "disabled";
};
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f4000 0x4000>;
interrupts = <0 30 0x04>;
+ clocks = <&clks 160>, <&clks 161>;
+ clock-names = "ipg", "per";
status = "disabled";
};
};
interrupt-parent = <&intc>;
ranges;
+ L2: l2-cache {
+ compatible = "marvell,tauros2-cache";
+ marvell,tauros2-cache-features = <0x3>;
+ };
+
axi@d4200000 { /* AXI */
compatible = "mrvl,axi-bus", "simple-bus";
#address-cells = <1>;
twsi1: i2c@d4011000 {
compatible = "mrvl,mmp-twsi";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0xd4011000 0x1000>;
interrupts = <7>;
mrvl,i2c-fast-mode;
twsi2: i2c@d4037000 {
compatible = "mrvl,mmp-twsi";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0xd4037000 0x1000>;
interrupts = <54>;
status = "disabled";
select SOC_IMX5
select ARCH_MX5
select ARCH_MX51
-
-config SOC_IMX53
- bool
- select SOC_IMX5
- select ARCH_MX5
- select ARCH_MX53
- select HAVE_CAN_FLEXCAN if CAN
+ select PINCTRL
+ select PINCTRL_IMX51
if ARCH_IMX_V4_V5
select IMX_HAVE_PLATFORM_IMX_FB
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_KEYPAD
+ select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MX2_CAMERA
select IMX_HAVE_PLATFORM_MXC_EHCI
config MACH_IMX31_DT
bool "Support i.MX31 platforms from device tree"
select SOC_IMX31
- select USE_OF
help
Include support for Freescale i.MX31 based platforms
using the device tree for discovery.
endchoice
-config MX51_EFIKA_COMMON
- bool
- select SOC_IMX51
- select IMX_HAVE_PLATFORM_IMX_UART
- select IMX_HAVE_PLATFORM_MXC_EHCI
- select IMX_HAVE_PLATFORM_PATA_IMX
- select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
- select IMX_HAVE_PLATFORM_SPI_IMX
- select MXC_ULPI if USB_ULPI
+comment "Device tree only"
-config MACH_MX51_EFIKAMX
- bool "Support MX51 Genesi Efika MX nettop"
- select LEDS_GPIO_REGISTER
- select MX51_EFIKA_COMMON
- help
- Include support for Genesi Efika MX nettop. This includes specific
- configurations for the board and its peripherals.
-
-config MACH_MX51_EFIKASB
- bool "Support MX51 Genesi Efika Smartbook"
- select LEDS_GPIO_REGISTER
- select MX51_EFIKA_COMMON
- help
- Include support for Genesi Efika Smartbook. This includes specific
- configurations for the board and its peripherals.
-
-comment "i.MX53 machines:"
-
-config MACH_IMX53_DT
- bool "Support i.MX53 platforms from device tree"
- select SOC_IMX53
- select MACH_MX53_ARD
- select MACH_MX53_EVK
- select MACH_MX53_LOCO
- select MACH_MX53_SMD
- help
- Include support for Freescale i.MX53 based platforms
- using the device tree for discovery
-
-config MACH_MX53_EVK
- bool "Support MX53 EVK platforms"
- select SOC_IMX53
- select IMX_HAVE_PLATFORM_IMX2_WDT
- select IMX_HAVE_PLATFORM_IMX_UART
- select IMX_HAVE_PLATFORM_IMX_I2C
- select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
- select IMX_HAVE_PLATFORM_SPI_IMX
- select LEDS_GPIO_REGISTER
- help
- Include support for MX53 EVK platform. This includes specific
- configurations for the board and its peripherals.
-
-config MACH_MX53_SMD
- bool "Support MX53 SMD platforms"
- select SOC_IMX53
- select IMX_HAVE_PLATFORM_IMX2_WDT
- select IMX_HAVE_PLATFORM_IMX_I2C
- select IMX_HAVE_PLATFORM_IMX_UART
- select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
- help
- Include support for MX53 SMD platform. This includes specific
- configurations for the board and its peripherals.
-
-config MACH_MX53_LOCO
- bool "Support MX53 LOCO platforms"
- select SOC_IMX53
- select IMX_HAVE_PLATFORM_IMX2_WDT
- select IMX_HAVE_PLATFORM_IMX_I2C
- select IMX_HAVE_PLATFORM_IMX_UART
- select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
- select IMX_HAVE_PLATFORM_GPIO_KEYS
- select LEDS_GPIO_REGISTER
- help
- Include support for MX53 LOCO platform. This includes specific
- configurations for the board and its peripherals.
+config SOC_IMX53
+ bool "i.MX53 support"
+ select SOC_IMX5
+ select ARCH_MX5
+ select ARCH_MX53
+ select HAVE_CAN_FLEXCAN if CAN
+ select PINCTRL
+ select PINCTRL_IMX53
-config MACH_MX53_ARD
- bool "Support MX53 ARD platforms"
- select SOC_IMX53
- select IMX_HAVE_PLATFORM_IMX2_WDT
- select IMX_HAVE_PLATFORM_IMX_I2C
- select IMX_HAVE_PLATFORM_IMX_UART
- select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
- select IMX_HAVE_PLATFORM_GPIO_KEYS
help
- Include support for MX53 ARD platform. This includes specific
- configurations for the board and its peripherals.
-
-comment "i.MX6 family:"
+ This enables support for Freescale i.MX53 processor.
config SOC_IMX6Q
bool "i.MX6 Quad support"
select HAVE_IMX_MMDC
select HAVE_IMX_SRC
select HAVE_SMP
- select MFD_ANATOP
+ select MFD_SYSCON
select PINCTRL
select PINCTRL_IMX6Q
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
-#include <linux/pinctrl/machine.h>
#include <linux/phy.h>
+ #include <linux/regmap.h>
#include <linux/micrel_phy.h>
- #include <linux/mfd/anatop.h>
+ #include <linux/mfd/syscon.h>
#include <asm/cpuidle.h>
#include <asm/smp_twd.h>
#include <asm/hardware/cache-l2x0.h>
/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
static int ksz9021rn_phy_fixup(struct phy_device *phydev)
{
- if (IS_ENABLED(CONFIG_PHYLIB)) {
+ if (IS_BUILTIN(CONFIG_PHYLIB)) {
/* min rx data delay */
phy_write(phydev, 0x0b, 0x8105);
phy_write(phydev, 0x0c, 0x0000);
clk_set_parent(cko1_sel, ahb);
rate = clk_round_rate(cko1, 16000000);
clk_set_rate(cko1, rate);
- clk_register_clkdev(cko1, NULL, "0-000a");
put_clk:
if (!IS_ERR(cko1_sel))
clk_put(cko1_sel);
static void __init imx6q_sabrelite_init(void)
{
- if (IS_ENABLED(CONFIG_PHYLIB))
+ if (IS_BUILTIN(CONFIG_PHYLIB))
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
ksz9021rn_phy_fixup);
imx6q_sabrelite_cko1_setup();
static void __init imx6q_usb_init(void)
{
- struct device_node *np;
- struct platform_device *pdev = NULL;
- struct anatop *adata = NULL;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
- if (np)
- pdev = of_find_device_by_node(np);
- if (pdev)
- adata = platform_get_drvdata(pdev);
- if (!adata) {
- if (np)
- of_node_put(np);
- return;
- }
+ struct regmap *anatop;
#define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
#define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
- /*
- * The external charger detector needs to be disabled,
- * or the signal at DP will be poor
- */
- anatop_write_reg(adata, HW_ANADIG_USB1_CHRG_DETECT,
- BM_ANADIG_USB_CHRG_DETECT_EN_B
- | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
- ~0);
- anatop_write_reg(adata, HW_ANADIG_USB2_CHRG_DETECT,
- BM_ANADIG_USB_CHRG_DETECT_EN_B |
- BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
- ~0);
-
- of_node_put(np);
+ anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
+ if (!IS_ERR(anatop)) {
+ /*
+ * The external charger detector needs to be disabled,
+ * or the signal at DP will be poor
+ */
+ regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
+ BM_ANADIG_USB_CHRG_DETECT_EN_B
+ | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
+ regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
+ BM_ANADIG_USB_CHRG_DETECT_EN_B |
+ BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
+ } else {
+ pr_warn("failed to find fsl,imx6q-anatop regmap\n");
+ }
}
static void __init imx6q_init_machine(void)
{
- /*
- * This should be removed when all imx6q boards have pinctrl
- * states for devices defined in device tree.
- */
- pinctrl_provide_dummies();
-
if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
imx6q_sabrelite_init();
};
static const char *imx6q_dt_compat[] __initdata = {
- "fsl,imx6q-arm2",
- "fsl,imx6q-sabrelite",
- "fsl,imx6q-sabresd",
"fsl,imx6q",
NULL,
};
DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
+ .smp = smp_ops(imx_smp_ops),
.map_io = imx6q_map_io,
.init_irq = imx6q_init_irq,
.handle_irq = imx6q_handle_irq,
#include <asm/io.h>
-#include <mach/hardware.h>
-#include <mach/irqs.h>
#include <plat/usb.h>
#include <plat/omap_device.h>
#ifdef CONFIG_MFD_OMAP_USB_HOST
#define OMAP_USBHS_DEVICE "usbhs_omap"
+ #define OMAP_USBTLL_DEVICE "usbhs_tll"
#define USBHS_UHH_HWMODNAME "usb_host_hs"
#define USBHS_TLL_HWMODNAME "usb_tll_hs"
static struct usbhs_omap_platform_data usbhs_data;
+ static struct usbtll_omap_platform_data usbtll_data;
static struct ehci_hcd_omap_platform_data ehci_data;
static struct ohci_hcd_omap_platform_data ohci_data;
void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
{
- struct omap_hwmod *oh[2];
+ struct omap_hwmod *uhh_hwm, *tll_hwm;
struct platform_device *pdev;
int bus_id = -1;
int i;
for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
usbhs_data.port_mode[i] = pdata->port_mode[i];
+ usbtll_data.port_mode[i] = pdata->port_mode[i];
ohci_data.port_mode[i] = pdata->port_mode[i];
ehci_data.port_mode[i] = pdata->port_mode[i];
ehci_data.reset_gpio_port[i] = pdata->reset_gpio_port[i];
setup_4430ohci_io_mux(pdata->port_mode);
}
- oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME);
- if (!oh[0]) {
+ uhh_hwm = omap_hwmod_lookup(USBHS_UHH_HWMODNAME);
+ if (!uhh_hwm) {
pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME);
return;
}
- oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME);
- if (!oh[1]) {
+ tll_hwm = omap_hwmod_lookup(USBHS_TLL_HWMODNAME);
+ if (!tll_hwm) {
pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME);
return;
}
- pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
- (void *)&usbhs_data, sizeof(usbhs_data),
+ pdev = omap_device_build(OMAP_USBTLL_DEVICE, bus_id, tll_hwm,
+ &usbtll_data, sizeof(usbtll_data),
omap_uhhtll_latency,
ARRAY_SIZE(omap_uhhtll_latency), false);
if (IS_ERR(pdev)) {
- pr_err("Could not build hwmod devices %s,%s\n",
- USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
+ pr_err("Could not build hwmod device %s\n",
+ USBHS_TLL_HWMODNAME);
+ return;
+ }
+
+ pdev = omap_device_build(OMAP_USBHS_DEVICE, bus_id, uhh_hwm,
+ &usbhs_data, sizeof(usbhs_data),
+ omap_uhhtll_latency,
+ ARRAY_SIZE(omap_uhhtll_latency), false);
+ if (IS_ERR(pdev)) {
+ pr_err("Could not build hwmod devices %s\n",
+ USBHS_UHH_HWMODNAME);
return;
}
}
/*
* arch/arm/mach-u300/i2c.c
*
- * Copyright (C) 2009 ST-Ericsson AB
+ * Copyright (C) 2009-2012 ST-Ericsson AB
* License terms: GNU General Public License (GPL) version 2
*
* Register board i2c devices
*/
#include <linux/kernel.h>
#include <linux/i2c.h>
- #include <linux/mfd/abx500.h>
+ #include <linux/mfd/ab3100.h>
#include <linux/regulator/machine.h>
#include <linux/amba/bus.h>
#include <mach/irqs.h>
};
static struct i2c_board_info __initdata bus1_i2c_board_info[] = {
-#ifdef CONFIG_MACH_U300_BS335
{
.type = "fwcam",
.addr = 0x10,
.type = "fwcam",
.addr = 0x5d,
},
-#else
- { },
-#endif
};
void __init u300_i2c_register_board_devices(void)
#define __ASM_ARCH_OMAP_USB_H
#include <linux/io.h>
+ #include <linux/platform_device.h>
#include <linux/usb/musb.h>
-#include <plat/board.h>
#define OMAP3_HS_USB_PORTS 3
struct ehci_hcd_omap_platform_data *ehci_data;
struct ohci_hcd_omap_platform_data *ohci_data;
};
+
+ struct usbtll_omap_platform_data {
+ enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
+ };
/*-------------------------------------------------------------------------*/
struct omap_musb_board_data {
extern void usb_musb_init(struct omap_musb_board_data *board_data);
extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
+ extern int omap_tll_enable(void);
+ extern int omap_tll_disable(void);
extern int omap4430_phy_power(struct device *dev, int ID, int on);
extern int omap4430_phy_set_clk(struct device *dev, int on);
config GPIO_DA9052
tristate "Dialog DA9052 GPIO"
- depends on PMIC_DA9052 && BROKEN
+ depends on PMIC_DA9052
help
Say yes here to enable the GPIO driver for the DA9052 chip.
Say yes here to support the STA2x11/ConneXt GPIO device.
The GPIO module has 128 GPIO pins with alternate functions.
+config GPIO_VT8500
+ bool "VIA/Wondermedia SoC GPIO Support"
+ depends on ARCH_VT8500
+ help
+ Say yes here to support the VT8500/WM8505/WM8650 GPIO controller.
+
config GPIO_XILINX
bool "Xilinx GPIO support"
depends on PPC_OF || MICROBLAZE
config GPIO_MC9S08DZ60
bool "MX35 3DS BOARD MC9S08DZ60 GPIO functions"
- depends on I2C && MACH_MX35_3DS
+ depends on I2C=y && MACH_MX35_3DS
help
Select this to enable the MC9S08DZ60 GPIO driver
config GPIO_PCF857X
tristate "PCF857x, PCA{85,96}7x, and MAX732[89] I2C GPIO expanders"
depends on I2C
+ select IRQ_DOMAIN
help
Say yes here to provide access to most "quasi-bidirectional" I2C
GPIO expanders used for additional digital outputs or inputs.
Say yes here to access the GPIO signals of various multi-function
power management chips from Texas Instruments.
+ config GPIO_TWL6040
+ tristate "TWL6040 GPO"
+ depends on TWL6040_CORE
+ help
+ Say yes here to access the GPO signals of twl6040
+ audio chip from Texas Instruments.
+
config GPIO_WM831X
tristate "WM831x GPIOs"
depends on MFD_WM831X
Say yes here to enable the adp5588 to be used as an interrupt
controller. It requires the driver to be built in the kernel.
+config GPIO_ADNP
+ tristate "Avionic Design N-bit GPIO expander"
+ depends on I2C && OF
+ help
+ This option enables support for N GPIOs found on Avionic Design
+ I2C GPIO expanders. The register space will be extended by powers
+ of two, so the controller will need to accomodate for that. For
+ example: if a controller provides 48 pins, 6 registers will be
+ enough to represent all pins, but the driver will assume a
+ register layout for 64 pins (8 registers).
+
comment "PCI GPIO expanders:"
config GPIO_CS5535
obj-$(CONFIG_GPIO_74X164) += gpio-74x164.o
obj-$(CONFIG_GPIO_AB8500) += gpio-ab8500.o
+obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o
obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o
obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o
obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o
obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o
obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o
obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o
+ obj-$(CONFIG_GPIO_TWL6040) += gpio-twl6040.o
obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o
obj-$(CONFIG_GPIO_VR41XX) += gpio-vr41xx.o
+obj-$(CONFIG_GPIO_VT8500) += gpio-vt8500.o
obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o
obj-$(CONFIG_GPIO_WM831X) += gpio-wm831x.o
obj-$(CONFIG_GPIO_WM8350) += gpio-wm8350.o
select MFD_CORE
default n
- config TWL6030_PWM
- tristate "TWL6030 PWM (Pulse Width Modulator) Support"
- depends on TWL4030_CORE
- select HAVE_PWM
- depends on !PWM
- default n
- help
- Say yes here if you want support for TWL6030 PWM.
- This is used to control charging LED brightness.
-
config TWL6040_CORE
bool "Support for TWL6040 audio codec"
depends on I2C=y && GENERIC_HARDIRQS
help
Support for Toshiba Mobile IO Controller T7L66XB
+ config MFD_SMSC
+ bool "Support for the SMSC ECE1099 series chips"
+ depends on I2C=y
+ select MFD_CORE
+ select REGMAP_I2C
+ help
+ If you say yes here you get support for the
+ ece1099 chips from SMSC.
+
+ To compile this driver as a module, choose M here: the
+ module will be called smsc.
+
config MFD_TC6387XB
bool "Support Toshiba TC6387XB"
depends on ARM && HAVE_CLK
config MFD_TC6393XB
bool "Support Toshiba TC6393XB"
- depends on GPIOLIB && ARM && HAVE_CLK
+ depends on ARM && HAVE_CLK
+ select GPIOLIB
select MFD_CORE
select MFD_TMIO
help
for accessing the device, additional drivers must be enabled in
order to use the functionality of the device.
+ config MFD_DA9055
+ bool "Dialog Semiconductor DA9055 PMIC Support"
+ select REGMAP_I2C
+ select REGMAP_IRQ
+ select PMIC_DA9055
+ select MFD_CORE
+ depends on I2C=y
+ help
+ Say yes here for support of Dialog Semiconductor DA9055. This is
+ a Power Management IC. This driver provides common support for
+ accessing the device as well as the I2C interface to the chip itself.
+ Additional drivers must be enabled in order to use the functionality
+ of the device.
+
+ This driver can be built as a module. If built as a module it will be
+ called "da9055"
+
config PMIC_ADP5520
bool "Analog Devices ADP5520/01 MFD PMIC Core Support"
depends on I2C=y
individual components like LCD backlight, LEDs, GPIOs and Kepad
under the corresponding menus.
+ config MFD_LP8788
+ bool "Texas Instruments LP8788 Power Management Unit Driver"
+ depends on I2C=y
+ select MFD_CORE
+ select REGMAP_I2C
+ select IRQ_DOMAIN
+ help
+ TI LP8788 PMU supports regulators, battery charger, RTC,
+ ADC, backlight driver and current sinks.
+
config MFD_MAX77686
bool "Maxim Semiconductor MAX77686 PMIC Support"
depends on I2C=y && GENERIC_HARDIRQS
additional drivers must be enabled in order to use the functionality
of the device.
+ config MFD_MAX8907
+ tristate "Maxim Semiconductor MAX8907 PMIC Support"
+ select MFD_CORE
+ depends on I2C=y && GENERIC_HARDIRQS
+ select REGMAP_I2C
+ select REGMAP_IRQ
+ help
+ Say yes here to support for Maxim Semiconductor MAX8907. This is
+ a Power Management IC. This driver provides common support for
+ accessing the device; additional drivers must be enabled in order
+ to use the functionality of the device.
+
config MFD_MAX8925
bool "Maxim Semiconductor MAX8925 PMIC Support"
depends on I2C=y && GENERIC_HARDIRQS
audio codec.
config MFD_OMAP_USB_HOST
- bool "Support OMAP USBHS core driver"
+ bool "Support OMAP USBHS core and TLL driver"
depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3
default y
help
depends on STA2X11
select MFD_CORE
- config MFD_ANATOP
- bool "Support for Freescale i.MX on-chip ANATOP controller"
- depends on SOC_IMX6Q
+ config MFD_SYSCON
+ bool "System Controller Register R/W Based on Regmap"
+ depends on OF
+ select REGMAP_MMIO
help
- Select this option to enable Freescale i.MX on-chip ANATOP
- MFD controller. This controller embeds regulator and
- thermal devices for Freescale i.MX platforms.
+ Select this option to enable accessing system control registers
+ via regmap.
config MFD_PALMAS
bool "Support for the TI Palmas series chips"
struct prcmu_fw_version version;
} fw_info;
+ static struct irq_domain *db8500_irq_domain;
+
/*
* This vector maps irq numbers to the bits in the bit field used in
* communication with the PRCMU firmware.
}
};
+
/*
* Used by MCDE to setup all necessary PRCMU registers
*/
spin_lock_irqsave(&mb0_transfer.dbb_irqs_lock, flags);
- mb0_transfer.req.dbb_irqs &= ~prcmu_irq_bit[d->irq - IRQ_PRCMU_BASE];
+ mb0_transfer.req.dbb_irqs &= ~prcmu_irq_bit[d->hwirq];
spin_unlock_irqrestore(&mb0_transfer.dbb_irqs_lock, flags);
spin_lock_irqsave(&mb0_transfer.dbb_irqs_lock, flags);
- mb0_transfer.req.dbb_irqs |= prcmu_irq_bit[d->irq - IRQ_PRCMU_BASE];
+ mb0_transfer.req.dbb_irqs |= prcmu_irq_bit[d->hwirq];
spin_unlock_irqrestore(&mb0_transfer.dbb_irqs_lock, flags);
}
}
+ static int db8500_irq_map(struct irq_domain *d, unsigned int virq,
+ irq_hw_number_t hwirq)
+ {
+ irq_set_chip_and_handler(virq, &prcmu_irq_chip,
+ handle_simple_irq);
+ set_irq_flags(virq, IRQF_VALID);
+
+ return 0;
+ }
+
+ static struct irq_domain_ops db8500_irq_ops = {
+ .map = db8500_irq_map,
+ .xlate = irq_domain_xlate_twocell,
+ };
+
+ static int db8500_irq_init(struct device_node *np)
+ {
+ db8500_irq_domain = irq_domain_add_legacy(
+ np, NUM_PRCMU_WAKEUPS, IRQ_PRCMU_BASE,
+ 0, &db8500_irq_ops, NULL);
+
+ if (!db8500_irq_domain) {
+ pr_err("Failed to create irqdomain\n");
+ return -ENOSYS;
+ }
+
+ return 0;
+ }
+
void __init db8500_prcmu_early_init(void)
{
- unsigned int i;
if (cpu_is_u8500v2()) {
void *tcpm_base = ioremap_nocache(U8500_PRCMU_TCPM_BASE, SZ_4K);
INIT_WORK(&mb0_transfer.mask_work, prcmu_mask_work);
- /* Initalize irqs. */
- for (i = 0; i < NUM_PRCMU_WAKEUPS; i++) {
- unsigned int irq;
-
- irq = IRQ_PRCMU_BASE + i;
- irq_set_chip_and_handler(irq, &prcmu_irq_chip,
- handle_simple_irq);
- set_irq_flags(irq, IRQF_VALID);
- }
compute_armss_rate();
}
goto no_irq_return;
}
+ db8500_irq_init(np);
+
for (i = 0; i < ARRAY_SIZE(db8500_prcmu_devs); i++) {
if (!strcmp(db8500_prcmu_devs[i].name, "ab8500-core")) {
db8500_prcmu_devs[i].platform_data = ab8500_platdata;
int id, int ext_pwr, int slots)
{
int ret;
- uint8_t sleepseq_val;
+ uint8_t sleepseq_val = 0;
unsigned int en_bit;
unsigned int slot_bit;
if (i2c->irq) {
ret = rc5t583_irq_init(rc5t583, i2c->irq, pdata->irq_base);
- /* Still continue with waring if irq init fails */
+ /* Still continue with warning, if irq init fails */
if (ret)
dev_warn(&i2c->dev, "IRQ init failed: %d\n", ret);
else
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/regulator/of_regulator.h>
+#include <linux/regulator/machine.h>
#include <linux/mfd/core.h>
#include <linux/mfd/tps6586x.h>
+ #define TPS6586X_SUPPLYENE 0x14
+ #define EXITSLREQ_BIT BIT(1)
+ #define SLEEP_MODE_BIT BIT(3)
+
/* interrupt control registers */
#define TPS6586X_INT_ACK1 0xb5
#define TPS6586X_INT_ACK2 0xb6
#ifdef CONFIG_OF
static struct of_regulator_match tps6586x_matches[] = {
+ { .name = "sys", .driver_data = (void *)TPS6586X_ID_SYS },
{ .name = "sm0", .driver_data = (void *)TPS6586X_ID_SM_0 },
{ .name = "sm1", .driver_data = (void *)TPS6586X_ID_SM_1 },
{ .name = "sm2", .driver_data = (void *)TPS6586X_ID_SM_2 },
struct tps6586x_platform_data *pdata;
struct tps6586x_subdev_info *devs;
struct device_node *regs;
+ const char *sys_rail_name = NULL;
unsigned int count;
unsigned int i, j;
int err;
return NULL;
for (i = 0, j = 0; i < num && j < count; i++) {
+ struct regulator_init_data *reg_idata;
+
if (!tps6586x_matches[i].init_data)
continue;
+ reg_idata = tps6586x_matches[i].init_data;
devs[j].name = "tps6586x-regulator";
devs[j].platform_data = tps6586x_matches[i].init_data;
devs[j].id = (int)tps6586x_matches[i].driver_data;
+ if (devs[j].id == TPS6586X_ID_SYS)
+ sys_rail_name = reg_idata->constraints.name;
+
+ if ((devs[j].id == TPS6586X_ID_LDO_5) ||
+ (devs[j].id == TPS6586X_ID_LDO_RTC))
+ reg_idata->supply_regulator = sys_rail_name;
+
devs[j].of_node = tps6586x_matches[i].of_node;
j++;
}
pdata->subdevs = devs;
pdata->gpio_base = -1;
pdata->irq_base = -1;
+ pdata->pm_off = of_property_read_bool(np, "ti,system-power-controller");
return pdata;
}
.cache_type = REGCACHE_RBTREE,
};
+ static struct device *tps6586x_dev;
+ static void tps6586x_power_off(void)
+ {
+ if (tps6586x_clr_bits(tps6586x_dev, TPS6586X_SUPPLYENE, EXITSLREQ_BIT))
+ return;
+
+ tps6586x_set_bits(tps6586x_dev, TPS6586X_SUPPLYENE, SLEEP_MODE_BIT);
+ }
+
static int __devinit tps6586x_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
goto err_add_devs;
}
+ if (pdata->pm_off && !pm_power_off) {
+ tps6586x_dev = &client->dev;
+ pm_power_off = tps6586x_power_off;
+ }
+
return 0;
err_add_devs:
#define DRIVER_NAME "twl"
- #if defined(CONFIG_KEYBOARD_TWL4030) || defined(CONFIG_KEYBOARD_TWL4030_MODULE)
- #define twl_has_keypad() true
- #else
- #define twl_has_keypad() false
- #endif
-
- #if defined(CONFIG_GPIO_TWL4030) || defined(CONFIG_GPIO_TWL4030_MODULE)
- #define twl_has_gpio() true
- #else
- #define twl_has_gpio() false
- #endif
-
- #if defined(CONFIG_REGULATOR_TWL4030) \
- || defined(CONFIG_REGULATOR_TWL4030_MODULE)
- #define twl_has_regulator() true
- #else
- #define twl_has_regulator() false
- #endif
-
- #if defined(CONFIG_TWL4030_MADC) || defined(CONFIG_TWL4030_MADC_MODULE)
- #define twl_has_madc() true
- #else
- #define twl_has_madc() false
- #endif
-
- #ifdef CONFIG_TWL4030_POWER
- #define twl_has_power() true
- #else
- #define twl_has_power() false
- #endif
-
- #if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
- #define twl_has_rtc() true
- #else
- #define twl_has_rtc() false
- #endif
-
- #if defined(CONFIG_TWL4030_USB) || defined(CONFIG_TWL4030_USB_MODULE) ||\
- defined(CONFIG_TWL6030_USB) || defined(CONFIG_TWL6030_USB_MODULE)
- #define twl_has_usb() true
- #else
- #define twl_has_usb() false
- #endif
-
- #if defined(CONFIG_TWL4030_WATCHDOG) || \
- defined(CONFIG_TWL4030_WATCHDOG_MODULE)
- #define twl_has_watchdog() true
- #else
- #define twl_has_watchdog() false
- #endif
-
- #if defined(CONFIG_MFD_TWL4030_AUDIO) || \
- defined(CONFIG_MFD_TWL4030_AUDIO_MODULE)
- #define twl_has_codec() true
- #else
- #define twl_has_codec() false
- #endif
-
- #if defined(CONFIG_CHARGER_TWL4030) || defined(CONFIG_CHARGER_TWL4030_MODULE)
- #define twl_has_bci() true
- #else
- #define twl_has_bci() false
- #endif
-
/* Triton Core internal information (BEGIN) */
/* Last - for index max*/
#define TWL_NUM_SLAVES 4
- #if defined(CONFIG_INPUT_TWL4030_PWRBUTTON) \
- || defined(CONFIG_INPUT_TWL4030_PWRBUTTON_MODULE)
- #define twl_has_pwrbutton() true
- #else
- #define twl_has_pwrbutton() false
- #endif
-
#define SUB_CHIP_ID0 0
#define SUB_CHIP_ID1 1
#define SUB_CHIP_ID2 2
}
EXPORT_SYMBOL_GPL(twl_get_version);
+ /**
+ * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate.
+ *
+ * Api to get the TWL HFCLK rate based on BOOT_CFG register.
+ */
+ int twl_get_hfclk_rate(void)
+ {
+ u8 ctrl;
+ int rate;
+
+ twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT);
+
+ switch (ctrl & 0x3) {
+ case HFCLK_FREQ_19p2_MHZ:
+ rate = 19200000;
+ break;
+ case HFCLK_FREQ_26_MHZ:
+ rate = 26000000;
+ break;
+ case HFCLK_FREQ_38p4_MHZ:
+ rate = 38400000;
+ break;
+ default:
+ pr_err("TWL4030: HFCLK is not configured\n");
+ rate = -EINVAL;
+ break;
+ }
+
+ return rate;
+ }
+ EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
+
static struct device *
add_numbered_child(unsigned chip, const char *name, int num,
void *pdata, unsigned pdata_len,
struct device *child;
unsigned sub_chip_id;
- if (twl_has_gpio() && pdata->gpio) {
+ if (IS_ENABLED(CONFIG_GPIO_TWL4030) && pdata->gpio) {
child = add_child(SUB_CHIP_ID1, "twl4030_gpio",
pdata->gpio, sizeof(*pdata->gpio),
false, irq_base + GPIO_INTR_OFFSET, 0);
return PTR_ERR(child);
}
- if (twl_has_keypad() && pdata->keypad) {
+ if (IS_ENABLED(CONFIG_KEYBOARD_TWL4030) && pdata->keypad) {
child = add_child(SUB_CHIP_ID2, "twl4030_keypad",
pdata->keypad, sizeof(*pdata->keypad),
true, irq_base + KEYPAD_INTR_OFFSET, 0);
return PTR_ERR(child);
}
- if (twl_has_madc() && pdata->madc) {
+ if (IS_ENABLED(CONFIG_TWL4030_MADC) && pdata->madc) {
child = add_child(2, "twl4030_madc",
pdata->madc, sizeof(*pdata->madc),
true, irq_base + MADC_INTR_OFFSET, 0);
return PTR_ERR(child);
}
- if (twl_has_rtc()) {
+ if (IS_ENABLED(CONFIG_RTC_DRV_TWL4030)) {
/*
* REVISIT platform_data here currently might expose the
* "msecure" line ... but for now we just expect board
return PTR_ERR(child);
}
- if (twl_has_usb() && pdata->usb && twl_class_is_4030()) {
+ if (IS_ENABLED(CONFIG_PWM_TWL6030) && twl_class_is_6030()) {
+ child = add_child(TWL6030_MODULE_ID1, "twl6030-pwm", NULL, 0,
+ false, 0, 0);
+ if (IS_ERR(child))
+ return PTR_ERR(child);
+ }
+
+ if (IS_ENABLED(CONFIG_TWL4030_USB) && pdata->usb &&
+ twl_class_is_4030()) {
static struct regulator_consumer_supply usb1v5 = {
.supply = "usb1v5",
};
/* First add the regulators so that they can be used by transceiver */
- if (twl_has_regulator()) {
+ if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) {
/* this is a template that gets copied */
struct regulator_init_data usb_fixed = {
.constraints.valid_modes_mask =
return PTR_ERR(child);
/* we need to connect regulators to this transceiver */
- if (twl_has_regulator() && child) {
+ if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child) {
usb1v5.dev_name = dev_name(child);
usb1v8.dev_name = dev_name(child);
usb3v1[0].dev_name = dev_name(child);
}
}
- if (twl_has_usb() && pdata->usb && twl_class_is_6030()) {
+ if (IS_ENABLED(CONFIG_TWL6030_USB) && pdata->usb &&
+ twl_class_is_6030()) {
static struct regulator_consumer_supply usb3v3;
int regulator;
- if (twl_has_regulator()) {
+ if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) {
/* this is a template that gets copied */
struct regulator_init_data usb_fixed = {
.constraints.valid_modes_mask =
if (IS_ERR(child))
return PTR_ERR(child);
/* we need to connect regulators to this transceiver */
- if (twl_has_regulator() && child)
+ if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child)
usb3v3.dev_name = dev_name(child);
- } else if (twl_has_regulator() && twl_class_is_6030()) {
+ } else if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) &&
+ twl_class_is_6030()) {
if (features & TWL6025_SUBCLASS)
child = add_regulator(TWL6025_REG_LDOUSB,
pdata->ldousb, features);
return PTR_ERR(child);
}
- if (twl_has_watchdog() && twl_class_is_4030()) {
+ if (IS_ENABLED(CONFIG_TWL4030_WATCHDOG) && twl_class_is_4030()) {
child = add_child(0, "twl4030_wdt", NULL, 0, false, 0, 0);
if (IS_ERR(child))
return PTR_ERR(child);
}
- if (twl_has_pwrbutton() && twl_class_is_4030()) {
+ if (IS_ENABLED(CONFIG_INPUT_TWL4030_PWRBUTTON) && twl_class_is_4030()) {
child = add_child(1, "twl4030_pwrbutton",
NULL, 0, true, irq_base + 8 + 0, 0);
if (IS_ERR(child))
return PTR_ERR(child);
}
- if (twl_has_codec() && pdata->audio && twl_class_is_4030()) {
+ if (IS_ENABLED(CONFIG_MFD_TWL4030_AUDIO) && pdata->audio &&
+ twl_class_is_4030()) {
sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid;
child = add_child(sub_chip_id, "twl4030-audio",
pdata->audio, sizeof(*pdata->audio),
}
/* twl4030 regulators */
- if (twl_has_regulator() && twl_class_is_4030()) {
+ if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_4030()) {
child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1,
features);
if (IS_ERR(child))
}
/* maybe add LDOs that are omitted on cost-reduced parts */
- if (twl_has_regulator() && !(features & TPS_SUBSET)
+ if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && !(features & TPS_SUBSET)
&& twl_class_is_4030()) {
child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2,
features);
}
/* twl6030 regulators */
- if (twl_has_regulator() && twl_class_is_6030() &&
+ if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_6030() &&
!(features & TWL6025_SUBCLASS)) {
child = add_regulator(TWL6030_REG_VDD1, pdata->vdd1,
features);
}
/* 6030 and 6025 share this regulator */
- if (twl_has_regulator() && twl_class_is_6030()) {
+ if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_6030()) {
child = add_regulator(TWL6030_REG_VANA, pdata->vana,
features);
if (IS_ERR(child))
}
/* twl6025 regulators */
- if (twl_has_regulator() && twl_class_is_6030() &&
+ if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_6030() &&
(features & TWL6025_SUBCLASS)) {
child = add_regulator(TWL6025_REG_LDO5, pdata->ldo5,
features);
}
- if (twl_has_bci() && pdata->bci &&
+ if (IS_ENABLED(CONFIG_CHARGER_TWL4030) && pdata->bci &&
!(features & (TPS_SUBSET | TWL5031))) {
child = add_child(3, "twl4030_bci",
pdata->bci, sizeof(*pdata->bci), false,
u32 rate;
u8 ctrl = HFCLK_FREQ_26_MHZ;
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- if (cpu_is_omap2430())
- osc = clk_get(dev, "osc_ck");
- else
- osc = clk_get(dev, "osc_sys_ck");
-
+ osc = clk_get(dev, "fck");
if (IS_ERR(osc)) {
printk(KERN_WARNING "Skipping twl internal clock init and "
"using bootloader value (unknown osc rate)\n");
rate = clk_get_rate(osc);
clk_put(osc);
-#else
- /* REVISIT for non-OMAP systems, pass the clock rate from
- * board init code, using platform_data.
- */
- osc = ERR_PTR(-EIO);
-
- printk(KERN_WARNING "Skipping twl internal clock init and "
- "using bootloader value (unknown osc rate)\n");
-
- return;
-#endif
-
switch (rate) {
case 19200000:
ctrl = HFCLK_FREQ_19p2_MHZ;
{
struct twl4030_platform_data *pdata = client->dev.platform_data;
struct device_node *node = client->dev.of_node;
+ struct platform_device *pdev;
int irq_base = 0;
int status;
unsigned i, num_slaves;
+ pdev = platform_device_alloc(DRIVER_NAME, -1);
+ if (!pdev) {
+ dev_err(&client->dev, "can't alloc pdev\n");
+ return -ENOMEM;
+ }
+
+ status = platform_device_add(pdev);
+ if (status) {
+ platform_device_put(pdev);
+ return status;
+ }
+
if (node && !pdata) {
/*
* XXX: Temporary pdata until the information is correctly
pdata = devm_kzalloc(&client->dev,
sizeof(struct twl4030_platform_data),
GFP_KERNEL);
- if (!pdata)
- return -ENOMEM;
+ if (!pdata) {
+ status = -ENOMEM;
+ goto free;
+ }
}
if (!pdata) {
dev_dbg(&client->dev, "no platform data?\n");
- return -EINVAL;
+ status = -EINVAL;
+ goto free;
}
+ platform_set_drvdata(pdev, pdata);
+
if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
dev_dbg(&client->dev, "can't talk I2C?\n");
- return -EIO;
+ status = -EIO;
+ goto free;
}
if (inuse) {
dev_dbg(&client->dev, "driver is already in use\n");
- return -EBUSY;
+ status = -EBUSY;
+ goto free;
}
if ((id->driver_data) & TWL6030_CLASS) {
inuse = true;
/* setup clock framework */
- clocks_init(&client->dev, pdata->clock);
+ clocks_init(&pdev->dev, pdata->clock);
/* read TWL IDCODE Register */
if (twl_id == TWL4030_CLASS_ID) {
}
/* load power event scripts */
- if (twl_has_power() && pdata->power)
+ if (IS_ENABLED(CONFIG_TWL4030_POWER) && pdata->power)
twl4030_power_init(pdata->power);
/* Maybe init the T2 Interrupt subsystem */
fail:
if (status < 0)
twl_remove(client);
+free:
+ if (status < 0)
+ platform_device_unregister(pdev);
return status;
}
menuconfig PWM
- bool "PWM Support"
+ bool "Pulse-Width Modulation (PWM) Support"
depends on !MACH_JZ4740 && !PUV3_PWM
help
- This enables PWM support through the generic PWM framework.
- You only need to enable this, if you also want to enable
- one or more of the PWM drivers below.
+ Generic Pulse-Width Modulation (PWM) support.
- If unsure, say N.
+ In Pulse-Width Modulation, a variation of the width of pulses
+ in a rectangular pulse signal is used as a means to alter the
+ average power of the signal. Applications include efficient
+ power delivery and voltage regulation. In computer systems,
+ PWMs are commonly used to control fans or the brightness of
+ display backlights.
+
+ This framework provides a generic interface to PWM devices
+ within the Linux kernel. On the driver side it provides an API
+ to register and unregister a PWM chip, an abstraction of a PWM
+ controller, that supports one or more PWM devices. Client
+ drivers can request PWM devices and use the generic framework
+ to configure as well as enable and disable them.
+
+ This generic framework replaces the legacy PWM framework which
+ allows only a single driver implementing the required API. Not
+ all legacy implementations have been ported to the framework
+ yet. The framework provides an API that is backward compatible
+ with the legacy framework so that existing client drivers
+ continue to work as expected.
+
+ If unsure, say no.
if PWM
To compile this driver as a module, choose M here: the module
will be called pwm-tiehrpwm.
+ config PWM_TWL6030
+ tristate "TWL6030 PWM support"
+ depends on TWL4030_CORE
+ help
+ Generic PWM framework driver for TWL6030.
+
+ To compile this driver as a module, choose M here: the module
+ will be called pwm-twl6030.
+
config PWM_VT8500
tristate "vt8500 pwm support"
depends on ARCH_VT8500
help
If this option is enabled then when a regulator lookup fails
and the board has not specified that it has provided full
- constraints then the regulator core will provide an always
- enabled dummy regulator will be provided, allowing consumer
- drivers to continue.
+ constraints the regulator core will provide an always
+ enabled dummy regulator, allowing consumer drivers to continue.
A warning will be generated when this substitution is done.
tristate "Virtual regulator consumer support"
help
This driver provides a virtual consumer for the voltage and
- current regulator API which provides sysfs controls for
- configuring the supplies requested. This is mainly useful
- for test purposes.
+ current regulator API which provides sysfs controls for
+ configuring the supplies requested. This is mainly useful
+ for test purposes.
- If unsure, say no.
+ If unsure, say no.
config REGULATOR_USERSPACE_CONSUMER
tristate "Userspace regulator consumer support"
from user space. Userspace consumer driver provides ability to
control power supplies for such devices.
- If unsure, say no.
+ If unsure, say no.
config REGULATOR_GPIO
tristate "GPIO regulator support"
This driver supports the voltage regulators of DA9052-BC and
DA9053-AA/Bx PMIC.
+config REGULATOR_FAN53555
+ tristate "Fairchild FAN53555 Regulator"
+ depends on I2C
+ select REGMAP_I2C
+ help
+ This driver supports Fairchild FAN53555 Digitally Programmable
+ TinyBuck Regulator. The FAN53555 is a step-down switching voltage
+ regulator that delivers a digitally programmable output from an
+ input voltage supply of 2.5V to 5.5V. The output voltage is
+ programmed through an I2C interface.
+
config REGULATOR_ANATOP
tristate "Freescale i.MX on-chip ANATOP LDO regulators"
- depends on MFD_ANATOP
+ depends on MFD_SYSCON
help
Say y here to support Freescale i.MX on-chip ANATOP LDOs
regulators. It is recommended that this option be
This driver controls a Maxim 8660/8661 voltage output
regulator via I2C bus.
+config REGULATOR_MAX8907
+ tristate "Maxim 8907 voltage regulator"
+ depends on MFD_MAX8907
+ help
+ This driver controls a Maxim 8907 voltage output regulator
+ via I2C bus. The provided regulator is suitable for Tegra
+ chip to control Step-Down DC-DC and LDOs.
+
config REGULATOR_MAX8925
tristate "Maxim MAX8925 Power Management IC"
depends on MFD_MAX8925
config REGULATOR_PCF50633
tristate "NXP PCF50633 regulator driver"
- depends on MFD_PCF50633
+ depends on MFD_PCF50633
help
Say Y here to support the voltage regulators and convertors
on PCF50633
depends on MFD_WM8350
help
This driver provides support for the voltage and current regulators
- of the WM8350 AudioPlus PMIC.
+ of the WM8350 AudioPlus PMIC.
config REGULATOR_WM8400
tristate "Wolfson Microelectronics WM8400 AudioPlus PMIC"
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/regulator/driver.h>
+ #include <linux/mfd/ab3100.h>
#include <linux/mfd/abx500.h>
/* LDO registers and some handy masking definitions for AB3100 */
return abreg->plfdata->external_voltage;
}
-static int ab3100_get_fixed_voltage_regulator(struct regulator_dev *reg)
-{
- return reg->desc->min_uV;
-}
-
static struct regulator_ops regulator_ops_fixed = {
.list_voltage = regulator_list_voltage_linear,
.enable = ab3100_enable_regulator,
.disable = ab3100_disable_regulator,
.is_enabled = ab3100_is_enabled_regulator,
- .get_voltage = ab3100_get_fixed_voltage_regulator,
};
static struct regulator_ops regulator_ops_variable = {
.id = AB3100_BUCK,
.ops = ®ulator_ops_variable_sleepable,
.n_voltages = ARRAY_SIZE(ldo_e_buck_typ_voltages),
+ .volt_table = ldo_e_buck_typ_voltages,
.type = REGULATOR_VOLTAGE,
.owner = THIS_MODULE,
.enable_time = 1000,
#include <linux/slab.h>
#include <linux/device.h>
#include <linux/module.h>
+ #include <linux/mfd/syscon.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_address.h>
- #include <linux/mfd/anatop.h>
+ #include <linux/regmap.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/of_regulator.h>
struct anatop_regulator {
const char *name;
u32 control_reg;
- struct anatop *mfd;
+ struct regmap *anatop;
int vol_bit_shift;
int vol_bit_width;
int min_bit_val;
struct regulator_init_data *initdata;
};
- static int anatop_set_voltage_sel(struct regulator_dev *reg, unsigned selector)
+ static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
+ unsigned selector)
{
struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
u32 val, mask;
mask = ((1 << anatop_reg->vol_bit_width) - 1) <<
anatop_reg->vol_bit_shift;
val <<= anatop_reg->vol_bit_shift;
- anatop_write_reg(anatop_reg->mfd, anatop_reg->control_reg, val, mask);
+ regmap_update_bits(anatop_reg->anatop, anatop_reg->control_reg,
+ mask, val);
return 0;
}
- static int anatop_get_voltage_sel(struct regulator_dev *reg)
+ static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
{
struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
- u32 val;
+ u32 val, mask;
if (!anatop_reg->control_reg)
return -ENOTSUPP;
- val = anatop_read_reg(anatop_reg->mfd, anatop_reg->control_reg);
+ regmap_read(anatop_reg->anatop, anatop_reg->control_reg, &val);
- val = (val & ((1 << anatop_reg->vol_bit_width) - 1)) >>
+ mask = ((1 << anatop_reg->vol_bit_width) - 1) <<
anatop_reg->vol_bit_shift;
+ val = (val & mask) >> anatop_reg->vol_bit_shift;
return val - anatop_reg->min_bit_val;
}
static struct regulator_ops anatop_rops = {
- .set_voltage_sel = anatop_set_voltage_sel,
- .get_voltage_sel = anatop_get_voltage_sel,
+ .set_voltage_sel = anatop_regmap_set_voltage_sel,
+ .get_voltage_sel = anatop_regmap_get_voltage_sel,
.list_voltage = regulator_list_voltage_linear,
.map_voltage = regulator_map_voltage_linear,
};
{
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
+ struct device_node *anatop_np;
struct regulator_desc *rdesc;
struct regulator_dev *rdev;
struct anatop_regulator *sreg;
struct regulator_init_data *initdata;
- struct anatop *anatopmfd = dev_get_drvdata(pdev->dev.parent);
struct regulator_config config = { };
int ret = 0;
rdesc->ops = &anatop_rops;
rdesc->type = REGULATOR_VOLTAGE;
rdesc->owner = THIS_MODULE;
- sreg->mfd = anatopmfd;
+
+ anatop_np = of_get_parent(np);
+ if (!anatop_np)
+ return -ENODEV;
+ sreg->anatop = syscon_node_to_regmap(anatop_np);
+ of_node_put(anatop_np);
+ if (IS_ERR(sreg->anatop))
+ return PTR_ERR(sreg->anatop);
+
ret = of_property_read_u32(np, "anatop-reg-offset",
&sreg->control_reg);
if (ret) {
#include <linux/slab.h>
#include <linux/regmap.h>
#include <linux/mfd/palmas.h>
+ #include <linux/of.h>
+ #include <linux/of_platform.h>
+ #include <linux/regulator/of_regulator.h>
struct regs_info {
char *name;
return 850000 + (selector * 50000);
}
-static int palmas_get_voltage_ldo_sel(struct regulator_dev *dev)
-{
- struct palmas_pmic *pmic = rdev_get_drvdata(dev);
- int id = rdev_get_id(dev);
- int selector;
- unsigned int reg;
- unsigned int addr;
-
- addr = palmas_regs_info[id].vsel_addr;
-
- palmas_ldo_read(pmic->palmas, addr, ®);
-
- selector = reg & PALMAS_LDO1_VOLTAGE_VSEL_MASK;
-
- /* Adjust selector to match list_voltage ranges */
- if (selector > 49)
- selector = 49;
-
- return selector;
-}
-
-static int palmas_set_voltage_ldo_sel(struct regulator_dev *dev,
- unsigned selector)
-{
- struct palmas_pmic *pmic = rdev_get_drvdata(dev);
- int id = rdev_get_id(dev);
- unsigned int reg = 0;
- unsigned int addr;
-
- addr = palmas_regs_info[id].vsel_addr;
-
- reg = selector;
-
- palmas_ldo_write(pmic->palmas, addr, reg);
-
- return 0;
-}
-
static int palmas_map_voltage_ldo(struct regulator_dev *rdev,
int min_uV, int max_uV)
{
int ret, voltage;
- ret = ((min_uV - 900000) / 50000) + 1;
- if (ret < 0)
- return ret;
+ if (min_uV == 0)
+ return 0;
+
+ if (min_uV < 900000)
+ min_uV = 900000;
+ ret = DIV_ROUND_UP(min_uV - 900000, 50000) + 1;
/* Map back into a voltage to verify we're still in bounds */
voltage = palmas_list_voltage_ldo(rdev, ret);
.is_enabled = palmas_is_enabled_ldo,
.enable = regulator_enable_regmap,
.disable = regulator_disable_regmap,
- .get_voltage_sel = palmas_get_voltage_ldo_sel,
- .set_voltage_sel = palmas_set_voltage_ldo_sel,
+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
.list_voltage = palmas_list_voltage_ldo,
.map_voltage = palmas_map_voltage_ldo,
};
addr = palmas_regs_info[id].ctrl_addr;
- ret = palmas_smps_read(palmas, addr, ®);
+ ret = palmas_ldo_read(palmas, addr, ®);
if (ret)
return ret;
if (reg_init->mode_sleep)
reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
- ret = palmas_smps_write(palmas, addr, reg);
+ ret = palmas_ldo_write(palmas, addr, reg);
if (ret)
return ret;
return 0;
}
+ static struct of_regulator_match palmas_matches[] = {
+ { .name = "smps12", },
+ { .name = "smps123", },
+ { .name = "smps3", },
+ { .name = "smps45", },
+ { .name = "smps457", },
+ { .name = "smps6", },
+ { .name = "smps7", },
+ { .name = "smps8", },
+ { .name = "smps9", },
+ { .name = "smps10", },
+ { .name = "ldo1", },
+ { .name = "ldo2", },
+ { .name = "ldo3", },
+ { .name = "ldo4", },
+ { .name = "ldo5", },
+ { .name = "ldo6", },
+ { .name = "ldo7", },
+ { .name = "ldo8", },
+ { .name = "ldo9", },
+ { .name = "ldoln", },
+ { .name = "ldousb", },
+ };
+
+ static void __devinit palmas_dt_to_pdata(struct device *dev,
+ struct device_node *node,
+ struct palmas_pmic_platform_data *pdata)
+ {
+ struct device_node *regulators;
+ u32 prop;
+ int idx, ret;
+
+ regulators = of_find_node_by_name(node, "regulators");
+ if (!regulators) {
+ dev_info(dev, "regulator node not found\n");
+ return;
+ }
+
+ ret = of_regulator_match(dev, regulators, palmas_matches,
+ PALMAS_NUM_REGS);
+ if (ret < 0) {
+ dev_err(dev, "Error parsing regulator init data: %d\n", ret);
+ return;
+ }
+
+ for (idx = 0; idx < PALMAS_NUM_REGS; idx++) {
+ if (!palmas_matches[idx].init_data ||
+ !palmas_matches[idx].of_node)
+ continue;
+
+ pdata->reg_data[idx] = palmas_matches[idx].init_data;
+
+ pdata->reg_init[idx] = devm_kzalloc(dev,
+ sizeof(struct palmas_reg_init), GFP_KERNEL);
+
+ ret = of_property_read_u32(palmas_matches[idx].of_node,
+ "ti,warm_reset", &prop);
+ if (!ret)
+ pdata->reg_init[idx]->warm_reset = prop;
+
+ ret = of_property_read_u32(palmas_matches[idx].of_node,
+ "ti,roof_floor", &prop);
+ if (!ret)
+ pdata->reg_init[idx]->roof_floor = prop;
+
+ ret = of_property_read_u32(palmas_matches[idx].of_node,
+ "ti,mode_sleep", &prop);
+ if (!ret)
+ pdata->reg_init[idx]->mode_sleep = prop;
+
+ ret = of_property_read_u32(palmas_matches[idx].of_node,
+ "ti,warm_reset", &prop);
+ if (!ret)
+ pdata->reg_init[idx]->warm_reset = prop;
+
+ ret = of_property_read_u32(palmas_matches[idx].of_node,
+ "ti,tstep", &prop);
+ if (!ret)
+ pdata->reg_init[idx]->tstep = prop;
+
+ ret = of_property_read_u32(palmas_matches[idx].of_node,
+ "ti,vsel", &prop);
+ if (!ret)
+ pdata->reg_init[idx]->vsel = prop;
+ }
+
+ ret = of_property_read_u32(node, "ti,ldo6_vibrator", &prop);
+ if (!ret)
+ pdata->ldo6_vibrator = prop;
+ }
+
+
static __devinit int palmas_probe(struct platform_device *pdev)
{
struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
struct palmas_pmic_platform_data *pdata = pdev->dev.platform_data;
+ struct device_node *node = pdev->dev.of_node;
struct regulator_dev *rdev;
struct regulator_config config = { };
struct palmas_pmic *pmic;
int id = 0, ret;
unsigned int addr, reg;
- if (!pdata)
- return -EINVAL;
- if (!pdata->reg_data)
- return -EINVAL;
+ if (node && !pdata) {
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+
+ if (!pdata)
+ return -ENOMEM;
+
+ palmas_dt_to_pdata(&pdev->dev, node, pdata);
+ }
pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
if (!pmic)
ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®);
if (ret)
- goto err_unregister_regulator;
+ return ret;
if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
pmic->smps123 = 1;
case PALMAS_REG_SMPS10:
pmic->desc[id].n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
pmic->desc[id].ops = &palmas_ops_smps10;
- pmic->desc[id].vsel_reg = PALMAS_SMPS10_CTRL;
+ pmic->desc[id].vsel_reg =
+ PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
+ PALMAS_SMPS10_CTRL);
pmic->desc[id].vsel_mask = SMPS10_VSEL;
pmic->desc[id].enable_reg =
PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
pmic->desc[id].owner = THIS_MODULE;
/* Initialise sleep/init values from platform data */
- if (pdata && pdata->reg_init) {
+ if (pdata) {
reg_init = pdata->reg_init[id];
if (reg_init) {
ret = palmas_smps_init(palmas, id, reg_init);
pmic->range[id] = 1;
}
- if (pdata && pdata->reg_data)
+ if (pdata)
config.init_data = pdata->reg_data[id];
else
config.init_data = NULL;
+ config.of_node = palmas_matches[id].of_node;
+
rdev = regulator_register(&pmic->desc[id], &config);
if (IS_ERR(rdev)) {
dev_err(&pdev->dev,
pmic->desc[id].type = REGULATOR_VOLTAGE;
pmic->desc[id].owner = THIS_MODULE;
+ pmic->desc[id].vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
+ palmas_regs_info[id].vsel_addr);
+ pmic->desc[id].vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
pmic->desc[id].enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
palmas_regs_info[id].ctrl_addr);
pmic->desc[id].enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
- if (pdata && pdata->reg_data)
+ if (pdata)
config.init_data = pdata->reg_data[id];
else
config.init_data = NULL;
+ config.of_node = palmas_matches[id].of_node;
+
rdev = regulator_register(&pmic->desc[id], &config);
if (IS_ERR(rdev)) {
dev_err(&pdev->dev,
pmic->rdev[id] = rdev;
/* Initialise sleep/init values from platform data */
- if (pdata->reg_init) {
+ if (pdata) {
reg_init = pdata->reg_init[id];
if (reg_init) {
ret = palmas_ldo_init(palmas, id, reg_init);
- if (ret)
+ if (ret) {
+ regulator_unregister(pmic->rdev[id]);
goto err_unregister_regulator;
+ }
}
}
}
return 0;
}
+ static struct of_device_id __devinitdata of_palmas_match_tbl[] = {
+ { .compatible = "ti,palmas-pmic", },
+ { /* end */ }
+ };
+
static struct platform_driver palmas_driver = {
.driver = {
.name = "palmas-pmic",
+ .of_match_table = of_palmas_match_tbl,
.owner = THIS_MODULE,
},
.probe = palmas_probe,
MODULE_DESCRIPTION("Palmas voltage regulator driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:palmas-pmic");
+ MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);
u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
int i;
- for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
+ for (i = ARRAY_SIZE(wm831x_dcdc_ilim) - 1; i >= 0; i--) {
if ((min_uA <= wm831x_dcdc_ilim[i]) &&
(wm831x_dcdc_ilim[i] <= max_uA))
- break;
+ return wm831x_set_bits(wm831x, reg,
+ WM831X_DC1_HC_THR_MASK,
+ i << WM831X_DC1_HC_THR_SHIFT);
}
- if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
- return -EINVAL;
- return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK,
- i << WM831X_DC1_HC_THR_SHIFT);
+ return -EINVAL;
}
static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
dcdc->wm831x = wm831x;
- res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ res = platform_get_resource(pdev, IORESOURCE_REG, 0);
if (res == NULL) {
- dev_err(&pdev->dev, "No I/O resource\n");
+ dev_err(&pdev->dev, "No REG resource\n");
ret = -EINVAL;
goto err;
}
dcdc->wm831x = wm831x;
- res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ res = platform_get_resource(pdev, IORESOURCE_REG, 0);
if (res == NULL) {
- dev_err(&pdev->dev, "No I/O resource\n");
+ dev_err(&pdev->dev, "No REG resource\n");
ret = -EINVAL;
goto err;
}
dcdc->wm831x = wm831x;
- res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ res = platform_get_resource(pdev, IORESOURCE_REG, 0);
if (res == NULL) {
- dev_err(&pdev->dev, "No I/O resource\n");
+ dev_err(&pdev->dev, "No REG resource\n");
ret = -EINVAL;
goto err;
}
/* Is it reporting under voltage? */
ret = wm831x_reg_read(wm831x, WM831X_LDO_UV_STATUS);
+ if (ret < 0)
+ return ret;
if (ret & mask)
return REGULATOR_STATUS_ERROR;
.set_mode = wm831x_gp_ldo_set_mode,
.get_status = wm831x_gp_ldo_get_status,
.get_optimum_mode = wm831x_gp_ldo_get_optimum_mode,
+ .get_bypass = regulator_get_bypass_regmap,
+ .set_bypass = regulator_set_bypass_regmap,
.is_enabled = regulator_is_enabled_regmap,
.enable = regulator_enable_regmap,
ldo->wm831x = wm831x;
- res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ res = platform_get_resource(pdev, IORESOURCE_REG, 0);
if (res == NULL) {
- dev_err(&pdev->dev, "No I/O resource\n");
+ dev_err(&pdev->dev, "No REG resource\n");
ret = -EINVAL;
goto err;
}
ldo->desc.vsel_mask = WM831X_LDO1_ON_VSEL_MASK;
ldo->desc.enable_reg = WM831X_LDO_ENABLE;
ldo->desc.enable_mask = 1 << id;
+ ldo->desc.bypass_reg = ldo->base;
+ ldo->desc.bypass_mask = WM831X_LDO1_SWI;
config.dev = pdev->dev.parent;
if (pdata)
/* Is it reporting under voltage? */
ret = wm831x_reg_read(wm831x, WM831X_LDO_UV_STATUS);
+ if (ret < 0)
+ return ret;
if (ret & mask)
return REGULATOR_STATUS_ERROR;
.get_mode = wm831x_aldo_get_mode,
.set_mode = wm831x_aldo_set_mode,
.get_status = wm831x_aldo_get_status,
+ .set_bypass = regulator_set_bypass_regmap,
+ .get_bypass = regulator_get_bypass_regmap,
.is_enabled = regulator_is_enabled_regmap,
.enable = regulator_enable_regmap,
ldo->wm831x = wm831x;
- res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ res = platform_get_resource(pdev, IORESOURCE_REG, 0);
if (res == NULL) {
- dev_err(&pdev->dev, "No I/O resource\n");
+ dev_err(&pdev->dev, "No REG resource\n");
ret = -EINVAL;
goto err;
}
ldo->desc.vsel_mask = WM831X_LDO7_ON_VSEL_MASK;
ldo->desc.enable_reg = WM831X_LDO_ENABLE;
ldo->desc.enable_mask = 1 << id;
+ ldo->desc.bypass_reg = ldo->base;
+ ldo->desc.bypass_mask = WM831X_LDO7_SWI;
config.dev = pdev->dev.parent;
if (pdata)
ldo->wm831x = wm831x;
- res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ res = platform_get_resource(pdev, IORESOURCE_REG, 0);
if (res == NULL) {
- dev_err(&pdev->dev, "No I/O resource\n");
+ dev_err(&pdev->dev, "No REG resource\n");
ret = -EINVAL;
goto err;
}
int twl_get_type(void);
int twl_get_version(void);
+ int twl_get_hfclk_rate(void);
int twl6030_interrupt_unmask(u8 bit_mask, u8 offset);
int twl6030_interrupt_mask(u8 bit_mask, u8 offset);
/* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */
struct twl4030_gpio_platform_data {
- int gpio_base;
- unsigned irq_base, irq_end;
-
/* package the two LED signals as output-only GPIOs? */
bool use_leds;
#define TPS6586X_SLEW_RATE_MASK 0x07
enum {
+ TPS6586X_ID_SYS,
TPS6586X_ID_SM_0,
TPS6586X_ID_SM_1,
TPS6586X_ID_SM_2,
int gpio_base;
int irq_base;
+ bool pm_off;
};
/*
#define TWL6040_GPO1 0x01
#define TWL6040_GPO2 0x02
- #define TWL6040_GPO3 0x03
+ #define TWL6040_GPO3 0x04
/* ACCCTL (0x2D) fields */
#define TWL6040_VIBROCDET 0x20
#define TWL6040_TSHUTDET 0x40
- #define TWL6040_CELLS 2
+ #define TWL6040_CELLS 3
#define TWL6040_REV_ES1_0 0x00
#define TWL6040_REV_ES1_1 0x01 /* Rev ES1.1 and ES1.2 */
#define TWL6040_SYSCLK_SEL_LPPLL 0
#define TWL6040_SYSCLK_SEL_HPPLL 1
+ #define TWL6040_GPO_MAX 3
+
struct twl6040_codec_data {
u16 hs_left_step;
u16 hs_right_step;
int vddvibr_uV; /* VDDVIBR volt, set 0 for fixed reg */
};
+ struct twl6040_gpo_data {
+ int gpio_base;
+ };
+
struct twl6040_platform_data {
int audpwron_gpio; /* audio power-on gpio */
- unsigned int irq_base;
struct twl6040_codec_data *codec;
struct twl6040_vibra_data *vibra;
+ struct twl6040_gpo_data *gpo;
};
struct regmap;
extern struct device_node *of_get_next_parent(struct device_node *node);
extern struct device_node *of_get_next_child(const struct device_node *node,
struct device_node *prev);
+extern struct device_node *of_get_next_available_child(
+ const struct device_node *node, struct device_node *prev);
+
+extern struct device_node *of_get_child_by_name(const struct device_node *node,
+ const char *name);
#define for_each_child_of_node(parent, child) \
for (child = of_get_next_child(parent, NULL); child != NULL; \
child = of_get_next_child(parent, child))
+#define for_each_available_child_of_node(parent, child) \
+ for (child = of_get_next_available_child(parent, NULL); child != NULL; \
+ child = of_get_next_available_child(parent, child))
+
static inline int of_get_child_count(const struct device_node *np)
{
struct device_node *child;
return "<no-node>";
}
+ static inline struct device_node *of_find_node_by_name(struct device_node *from,
+ const char *name)
+ {
+ return NULL;
+ }
+
static inline bool of_have_populated_dt(void)
{
return false;
projects / ~andy / linux / commitdiff