]> Pileus Git - ~andy/linux/commitdiff
powerpc/85xx: Update SRIO device tree nodes
authorKumar Gala <galak@kernel.crashing.org>
Thu, 17 Nov 2011 14:01:40 +0000 (08:01 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 24 Nov 2011 08:01:39 +0000 (02:01 -0600)
Update all dts files that support SRIO controllers to match the new
fsl,srio device tree binding.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 files changed:
arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8568mds.dts
arch/powerpc/boot/dts/mpc8569mds.dts
arch/powerpc/boot/dts/mpc8641_hpcn.dts
arch/powerpc/boot/dts/p2041rdb.dts
arch/powerpc/boot/dts/p3041ds.dts
arch/powerpc/boot/dts/p4080ds.dts
arch/powerpc/boot/dts/p5020ds.dts

index 6a9cca8657744a7eb2d113bf81d5319f8b686b64..64e7075a9cd4ce40212b07b6146ed1dd48150de8 100644 (file)
 };
 
 &rio {
+       compatible = "fsl,srio";
+       interrupts = <48 2 0 0>;
        #address-cells = <2>;
        #size-cells = <2>;
-       compatible = "fsl,mpc8568-rapidio", "fsl,rapidio-delta";
-       interrupts = <48 2 0 0 /* error     */
-                     49 2 0 0 /* bell_outb */
-                     50 2 0 0 /* bell_inb  */
-                     53 2 0 0 /* msg1_tx   */
-                     54 2 0 0 /* msg1_rx   */
-                     55 2 0 0 /* msg2_tx   */
-                     56 2 0 0 /* msg2_rx   */>;
-       sleep = <&pmc 0x00080000   /* controller */
-                &pmc 0x00040000>; /* message unit */
+       fsl,srio-rmu-handle = <&rmu>;
+       sleep = <&pmc 0x00080000>;
+       ranges;
+
+       port1 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <1>;
+       };
 };
 
 &soc {
        };
 
 /include/ "pq3-mpic.dtsi"
+/include/ "pq3-rmu-0.dtsi"
+       rmu@d3000 {
+               sleep = <&pmc 0x00040000>;
+       };
 
        global-utilities@e0000 {
                #address-cells = <1>;
index eb75a18e61e4fdabd61899e1c7420bd4279020e4..3e6346a4a183646b1ef5de9413b16f972ae1c867 100644 (file)
 };
 
 &rio {
+       compatible = "fsl,srio";
+       interrupts = <48 2 0 0>;
        #address-cells = <2>;
        #size-cells = <2>;
-       compatible = "fsl,mpc8569-rapidio", "fsl,rapidio-delta";
-       interrupts = <48 2 0 0 /* error     */
-                     49 2 0 0 /* bell_outb */
-                     50 2 0 0 /* bell_inb  */
-                     53 2 0 0 /* msg1_tx   */
-                     54 2 0 0 /* msg1_rx   */
-                     55 2 0 0 /* msg2_tx   */
-                     56 2 0 0 /* msg2_rx   */>;
+       fsl,srio-rmu-handle = <&rmu>;
        sleep = <&pmc 0x00080000>;
+       ranges;
+
+       port1 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <1>;
+       };
+
+       port2 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <2>;
+       };
 };
 
 &soc {
        };
 
 /include/ "pq3-mpic.dtsi"
+/include/ "pq3-rmu-0.dtsi"
+       rmu@d3000 {
+               sleep = <&pmc 0x00040000>;
+       };
 
        global-utilities@e0000 {
                #address-cells = <1>;
index 8d037cf79c944e58aee993e1e021bcfaeee138f2..234a399ddeb2cbb6e32c7395ecf340925d072f29 100644 (file)
        };
 };
 
+&rio {
+       compatible = "fsl,srio";
+       interrupts = <16 2 1 11>;
+       #address-cells = <2>;
+       #size-cells = <2>;
+       ranges;
+
+       port1 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <1>;
+       };
+
+       port2 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <2>;
+       };
+};
+
 &dcsr {
        #address-cells = <1>;
        #size-cells = <1>;
index 9cda4814a23ebcf7bfcfa794bde37b335334bc91..d41d08de7f7e3e1356d326731b4b3c15f47de673 100644 (file)
        };
 };
 
+&rio {
+       compatible = "fsl,srio";
+       interrupts = <16 2 1 11>;
+       #address-cells = <2>;
+       #size-cells = <2>;
+       ranges;
+
+       port1 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <1>;
+       };
+
+       port2 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <2>;
+       };
+};
+
 &dcsr {
        #address-cells = <1>;
        #size-cells = <1>;
index 1510991a40d38b52ee6412a044a7a1c9c13f7e16..8d35d2c1f694772ae733fc4d20c0d1fad683948a 100644 (file)
 };
 
 &rio {
+       compatible = "fsl,srio";
+       interrupts = <16 2 1 11>;
        #address-cells = <2>;
        #size-cells = <2>;
-       compatible = "fsl,rapidio-delta";
-       interrupts = <
-               16 2 1 11 /* err_irq */
-               56 2 0 0  /* bell_outb_irq */
-               57 2 0 0  /* bell_inb_irq */
-               60 2 0 0  /* msg1_tx_irq */
-               61 2 0 0  /* msg1_rx_irq */
-               62 2 0 0  /* msg2_tx_irq */
-               63 2 0 0>; /* msg2_rx_irq */
+       fsl,srio-rmu-handle = <&rmu>;
+       ranges;
+
+       port1 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <1>;
+       };
+
+       port2 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <2>;
+       };
 };
 
 &dcsr {
                        16 2 1 30>;
        };
 
+/include/ "qoriq-rmu-0.dtsi"
 /include/ "qoriq-mpic.dtsi"
 
        guts: global-utilities@e0000 {
index b353ac9da01c39d58dd1143c63065fab70bd9345..b9556ee3a63975a57e17ad0c90d168dc622e2a37 100644 (file)
@@ -69,8 +69,6 @@
                rtic_c = &rtic_c;
                rtic_d = &rtic_d;
                sec_mon = &sec_mon;
-
-               rio0 = &rapidio0;
        };
 
        cpus {
index 7135c67bb5a66190c322b51802905a9c1a467aef..914074b91a8561ecf89fce5fa3316d17c0f9cf47 100644 (file)
        };
 };
 
+&rio {
+       compatible = "fsl,srio";
+       interrupts = <16 2 1 11>;
+       #address-cells = <2>;
+       #size-cells = <2>;
+       ranges;
+
+       port1 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <1>;
+       };
+
+       port2 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               cell-index = <2>;
+       };
+};
+
 &dcsr {
        #address-cells = <1>;
        #size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi
new file mode 100644 (file)
index 0000000..587ca9f
--- /dev/null
@@ -0,0 +1,68 @@
+/*
+ * PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+rmu: rmu@d3000 {
+       #address-cells = <1>;
+       #size-cells = <1>;
+       compatible = "fsl,srio-rmu";
+       reg = <0xd3000 0x500>;
+       ranges = <0x0 0xd3000 0x500>;
+
+       message-unit@0 {
+               compatible = "fsl,srio-msg-unit";
+               reg = <0x0 0x100>;
+               interrupts = <
+                       53 2 0 0 /* msg1_tx_irq */
+                       54 2 0 0>;/* msg1_rx_irq */
+       };
+       message-unit@100 {
+               compatible = "fsl,srio-msg-unit";
+               reg = <0x100 0x100>;
+               interrupts = <
+                       55 2 0 0  /* msg2_tx_irq */
+                       56 2 0 0>;/* msg2_rx_irq */
+       };
+       doorbell-unit@400 {
+               compatible = "fsl,srio-dbell-unit";
+               reg = <0x400 0x80>;
+               interrupts = <
+                       49 2 0 0  /* bell_outb_irq */
+                       50 2 0 0>;/* bell_inb_irq */
+       };
+       port-write-unit@4e0 {
+               compatible = "fsl,srio-port-write-unit";
+               reg = <0x4e0 0x20>;
+               interrupts = <48 2 0 0>;
+       };
+};
index 02eaad3d5a7c960737df6f03a78038fe8e5a2686..09598bb5d443497669ebdc998fbbca30e085371f 100644 (file)
 
        rio: rapidio@e00c00000 {
                reg = <0x0 0xe00c0000 0x0 0x20000>;
-               ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+               port1 {
+                       ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+               };
        };
 
        leds {
index 976a7f99f7f575c5148e0205680db94a31c647b8..7e283c891b7f8871eca5dc5a64a79d9bb4e56590 100644 (file)
 
        rio: rapidio@e00c00000 {
                reg = <0x0 0xe00c0000 0x0 0x20000>;
-               ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+               port1 {
+                       ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+               };
+               port2 {
+                       status = "disabled";
+               };
        };
 };
 
index 848320e4d3c4060049e6d78b1449aa24a62b8606..fb8640e0c5b8ca4ea37b61ae3f79e5e4f8bfbe5e 100644 (file)
                serial1 = &serial1;
                pci0 = &pci0;
                pci1 = &pci1;
-/*
- * Only one of Rapid IO or PCI can be present due to HW limitations and
- * due to the fact that the 2 now share address space in the new memory
- * map.  The most likely case is that we have PCI, so comment out the
- * rapidio node.  Leave it here for reference.
- */
-               /* rapidio0 = &rapidio0; */
        };
 
        cpus {
                        device_type = "open-pic";
                };
 
+               rmu: rmu@d3000 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "fsl,srio-rmu";
+                       reg = <0xd3000 0x500>;
+                       ranges = <0x0 0xd3000 0x500>;
+
+                       message-unit@0 {
+                               compatible = "fsl,srio-msg-unit";
+                               reg = <0x0 0x100>;
+                               interrupts = <
+                                       53 2 /* msg1_tx_irq */
+                                       54 2>;/* msg1_rx_irq */
+                       };
+                       message-unit@100 {
+                               compatible = "fsl,srio-msg-unit";
+                               reg = <0x100 0x100>;
+                               interrupts = <
+                                       55 2  /* msg2_tx_irq */
+                                       56 2>;/* msg2_rx_irq */
+                       };
+                       doorbell-unit@400 {
+                               compatible = "fsl,srio-dbell-unit";
+                               reg = <0x400 0x80>;
+                               interrupts = <
+                                       49 2  /* bell_outb_irq */
+                                       50 2>;/* bell_inb_irq */
+                       };
+                       port-write-unit@4e0 {
+                               compatible = "fsl,srio-port-write-unit";
+                               reg = <0x4e0 0x20>;
+                               interrupts = <48 2>;
+                       };
+               };
+
                global-utilities@e0000 {
                        compatible = "fsl,mpc8641-guts";
                        reg = <0xe0000 0x1000>;
                };
        };
 /*
-       rapidio0: rapidio@ffec0000 {
+ * Only one of Rapid IO or PCI can be present due to HW limitations and
+ * due to the fact that the 2 now share address space in the new memory
+ * map.  The most likely case is that we have PCI, so comment out the
+ * rapidio node.  Leave it here for reference.
+
+       rapidio@ffec0000 {
+               reg = <0xffec0000 0x11000>;
+               compatible = "fsl,srio";
+               interrupt-parent = <&mpic>;
+               interrupts = <48 2>;
                #address-cells = <2>;
                #size-cells = <2>;
-               compatible = "fsl,rapidio-delta";
-               reg = <0xffec0000 0x20000>;
-               ranges = <0 0 0x80000000 0 0x20000000>;
-               interrupt-parent = <&mpic>;
-               // err_irq bell_outb_irq bell_inb_irq
-               //      msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
-               interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
+               fsl,srio-rmu-handle = <&rmu>;
+               ranges;
+
+               port1 {
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       cell-index = <1>;
+                       ranges = <0 0 0x80000000 0 0x20000000>;
+               };
        };
 */
 
index d6ea24d1537bea946bbf5aa6982e9649fa7d1702..4f957db01230906e23b8cdd854a2f4ac00813491 100644 (file)
                };
        };
 
+       rio: rapidio@ffe0c0000 {
+               reg = <0xf 0xfe0c0000 0 0x11000>;
+
+               port1 {
+                       ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+               };
+               port2 {
+                       ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+               };
+       };
+
        lbc: localbus@ffe124000 {
                reg = <0xf 0xfe124000 0 0x1000>;
                ranges = <0 0 0xf 0xe8000000 0x08000000>;
index 1053d691cf1d45a5f25c6111f649340ea1ae7d9d..f469145abaeb420e8dc31b44a87672273c14ab4d 100644 (file)
                };
        };
 
+       rio: rapidio@ffe0c0000 {
+               reg = <0xf 0xfe0c0000 0 0x11000>;
+
+               port1 {
+                       ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+               };
+               port2 {
+                       ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+               };
+       };
+
        lbc: localbus@ffe124000 {
                reg = <0xf 0xfe124000 0 0x1000>;
                ranges = <0 0 0xf 0xe8000000 0x08000000
index 8ea1ae9081563ac63ac6d15d29d4ff8f643d3562..6d60e54e50a09a6fbbec45d686f85ba7b5c00fa3 100644 (file)
                };
        };
 
-       rio: rapidio0: rapidio@ffe0c0000 {
-               reg = <0xf 0xfe0c0000 0 0x20000>;
-               ranges = <0 0 0xc 0x20000000 0 0x01000000>;
+       rio: rapidio@ffe0c0000 {
+               reg = <0xf 0xfe0c0000 0 0x11000>;
+
+               port1 {
+                       ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+               };
+               port2 {
+                       ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+               };
        };
 
        lbc: localbus@ffe124000 {
index ceee4f50ba42d93c1b6ef56b814c36046070c962..1c250684c9028cfa70e17c675292d72247a69da1 100644 (file)
                };
        };
 
+       rio: rapidio@ffe0c0000 {
+               reg = <0xf 0xfe0c0000 0 0x11000>;
+
+               port1 {
+                       ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+               };
+               port2 {
+                       ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+               };
+       };
+
        lbc: localbus@ffe124000 {
                reg = <0xf 0xfe124000 0 0x1000>;
                ranges = <0 0 0xf 0xe8000000 0x08000000