ath9k_hw: remove additional_swba_backoff

It is unused

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 3e23abbcf084dadd7cc22515fa499d7cb0dce8e1..073346abc3f06ee8fdaec9594e2e45a66b6a07b7 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -441,7 +441,6 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
 {
        ah->config.dma_beacon_response_time = 1;
        ah->config.sw_beacon_response_time = 6;
-       ah->config.additional_swba_backoff = 0;
        ah->config.ack_6mb = 0x0;
        ah->config.cwm_ignore_extcca = 0;
        ah->config.analog_shiftreg = 1;

diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 57d3d0c3a99fc337bb3260410040e2f1bc8513fc..2ef9d2472a968661aeae8449bd1f11740d875172 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -280,7 +280,6 @@ struct ath9k_hw_capabilities {
 struct ath9k_ops_config {
        int dma_beacon_response_time;
        int sw_beacon_response_time;
-       int additional_swba_backoff;
        int ack_6mb;
        u32 cwm_ignore_extcca;
        u32 pcie_waen;

diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
index a8504822b4fdca0010f822dabf4eee52bf831804..89d7e206992b2ec28fb100b109d7b9e63d4a441d 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/mac.c
+++ b/drivers/net/wireless/ath/ath9k/mac.c
@@ -481,8 +481,7 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
                            | AR_Q_MISC_CBR_INCR_DIS0);
                value = (qi->tqi_readyTime -
                         (ah->config.sw_beacon_response_time -
-                         ah->config.dma_beacon_response_time) -
-                        ah->config.additional_swba_backoff) * 1024;
+                         ah->config.dma_beacon_response_time)) * 1024;
                REG_WRITE(ah, AR_QRDYTIMECFG(q),
                          value | AR_Q_RDYTIMECFG_EN);
                REG_SET_BIT(ah, AR_DMISC(q),