]> Pileus Git - ~andy/linux/commitdiff
ARM: EXYNOS: Fix MSHC clocks instance names
authorDongjin Kim <tobetter@gmail.com>
Tue, 18 Dec 2012 16:57:06 +0000 (08:57 -0800)
committerKukjin Kim <kgene.kim@samsung.com>
Wed, 19 Dec 2012 17:25:27 +0000 (09:25 -0800)
Replace clock instance name of MSHC controller for BIC and CIU of Exynos4412.

Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-exynos/clock-exynos4.c

index efead60b943699d160fa8754e9435cfba4a658fc..bbcb3dea0d40e61de4c003a6c3ac46cc8b5157dc 100644 (file)
@@ -529,7 +529,7 @@ static struct clk exynos4_init_clocks_off[] = {
                .enable         = exynos4_clk_ip_fsys_ctrl,
                .ctrlbit        = (1 << 8),
        }, {
-               .name           = "dwmmc",
+               .name           = "biu",
                .parent         = &exynos4_clk_aclk_133.clk,
                .enable         = exynos4_clk_ip_fsys_ctrl,
                .ctrlbit        = (1 << 9),
@@ -1134,7 +1134,7 @@ static struct clksrc_clk exynos4_clksrcs[] = {
                .reg_div = { .reg = EXYNOS4_CLKDIV_MFC, .shift = 0, .size = 4 },
        }, {
                .clk    = {
-                       .name           = "sclk_dwmmc",
+                       .name           = "ciu",
                        .parent         = &exynos4_clk_dout_mmc4.clk,
                        .enable         = exynos4_clksrc_mask_fsys_ctrl,
                        .ctrlbit        = (1 << 16),