]> Pileus Git - ~andy/linux/commitdiff
mtd: nand: fix incorrect ecc strength values
authorMike Dunn <mikedunn@newsguy.com>
Wed, 25 Apr 2012 19:06:06 +0000 (12:06 -0700)
committerDavid Woodhouse <David.Woodhouse@intel.com>
Mon, 14 May 2012 04:10:28 +0000 (23:10 -0500)
This fixes a couple of ecc strength values for which I earlier made conservative
guesses, but whose correct values were later determined¹ (thanks Ivan).  Also
sets strength for fsl_ifc_nand, which was merged to mainline after the original
patch that set the strength for all drivers.

¹ http://lists.infradead.org/pipermail/linux-mtd/2012-March/040325.html

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
drivers/mtd/nand/bcm_umi_nand.c
drivers/mtd/nand/fsl_ifc_nand.c
drivers/mtd/nand/jz4740_nand.c

index 6908cdde3065e73b24509e8c9d32865f5befb1d9..7134adfa1089efc056ff29cd65ac02f6770bbb4c 100644 (file)
@@ -476,12 +476,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
                this->badblock_pattern = &largepage_bbt;
        }
 
-       /*
-        * FIXME: ecc strength value of 6 bits per 512 bytes of data is a
-        * conservative guess, given 13 ecc bytes and using bch alg.
-        * (Assume Galois field order m=15 to allow a margin of error.)
-        */
-       this->ecc.strength = 6;
+       this->ecc.strength = 8;
 
 #endif
 
index 5387cec53c9aa669f717e062415e418990dfdf72..872cc9605291762d5d4eebd9e2977c9229a05de3 100644 (file)
@@ -821,6 +821,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
        /* Hardware generates ECC per 512 Bytes */
        chip->ecc.size = 512;
        chip->ecc.bytes = 8;
+       chip->ecc.strength = 4;
 
        switch (csor & CSOR_NAND_PGS_MASK) {
        case CSOR_NAND_PGS_512:
index e4147e8acb7c560f2a8c3fdae68bf1027266fdba..a6fa884ae49bb08deba807ae6aeca7f0fcbabff7 100644 (file)
@@ -332,11 +332,7 @@ static int __devinit jz_nand_probe(struct platform_device *pdev)
        chip->ecc.mode          = NAND_ECC_HW_OOB_FIRST;
        chip->ecc.size          = 512;
        chip->ecc.bytes         = 9;
-       chip->ecc.strength      = 2;
-       /*
-        * FIXME: ecc_strength value of 2 bits per 512 bytes of data is a
-        * conservative guess, given 9 ecc bytes and reed-solomon alg.
-        */
+       chip->ecc.strength      = 4;
 
        if (pdata)
                chip->ecc.layout = pdata->ecc_layout;