]> Pileus Git - ~andy/linux/commitdiff
ARM i.MX5: Move IPU clock lookups into device tree
authorPhilipp Zabel <p.zabel@pengutronix.de>
Wed, 27 Mar 2013 17:30:36 +0000 (18:30 +0100)
committerShawn Guo <shawn.guo@linaro.org>
Tue, 9 Apr 2013 14:52:55 +0000 (22:52 +0800)
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx51.dtsi
arch/arm/boot/dts/imx53.dtsi
arch/arm/mach-imx/clk-imx51-imx53.c

index 32b85a836fb5cf992130ce5b2f9d506b93d9d1bd..76d84a4b8508e154fd267a2d37d7f2214e015f6b 100644 (file)
@@ -68,6 +68,8 @@
                        compatible = "fsl,imx51-ipu";
                        reg = <0x40000000 0x20000000>;
                        interrupts = <11 10>;
+                       clocks = <&clks 59>, <&clks 110>, <&clks 61>;
+                       clock-names = "bus", "di0", "di1";
                };
 
                aips@70000000 { /* AIPS1 */
index 6c73bee96ce047bddf6227855b534e02cd2abb9d..07f656ee31f0fe9b02c09ec5ad74025939ca121d 100644 (file)
@@ -73,6 +73,8 @@
                        compatible = "fsl,imx53-ipu";
                        reg = <0x18000000 0x080000000>;
                        interrupts = <11 10>;
+                       clocks = <&clks 59>, <&clks 110>, <&clks 61>;
+                       clock-names = "bus", "di0", "di1";
                };
 
                aips@50000000 { /* AIPS1 */
index 0f39f8c93b947bc0d8b8257612d391a93dd67302..d22ee6af3a770d60b30562bd7dc698400e4c1655 100644 (file)
@@ -362,9 +362,6 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
        clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL);
        clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0");
        clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
-       clk_register_clkdev(clk[ipu_gate], "bus", "40000000.ipu");
-       clk_register_clkdev(clk[ipu_di0_gate], "di0", "40000000.ipu");
-       clk_register_clkdev(clk[ipu_di1_gate], "di1", "40000000.ipu");
        clk_register_clkdev(clk[usb_phy_gate], "phy", "mxc-ehci.0");
        clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx51.0");
        clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.0");
@@ -471,10 +468,6 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
        clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
        clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
        clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0");
-       clk_register_clkdev(clk[ipu_gate], "bus", "18000000.ipu");
-       clk_register_clkdev(clk[ipu_di0_gate], "di0", "18000000.ipu");
-       clk_register_clkdev(clk[ipu_di1_gate], "di1", "18000000.ipu");
-       clk_register_clkdev(clk[ipu_gate], "hsp", "18000000.ipu");
        clk_register_clkdev(clk[usb_phy1_gate], "usb_phy1", "mxc-ehci.0");
        clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx53.0");
        clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.0");