bnx2: Enable auto-mdix when autoneg is disabled.

Auto-mdix currently only works if autoneg is enabled.  This patch enables
auto-mdix all the time by setting a bit in a PHY register.  Define
meaningful constants for this PHY registers.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/broadcom/bnx2.c b/drivers/net/ethernet/broadcom/bnx2.c
index 1ae3348df3efe59b376753924f9f885356058d8b..b380c69d57a557088e416532521803b76abc8416 100644 (file)
--- a/drivers/net/ethernet/broadcom/bnx2.c
+++ b/drivers/net/ethernet/broadcom/bnx2.c
@@ -2343,9 +2343,15 @@ bnx2_init_copper_phy(struct bnx2 *bp, int reset_phy)
        }
 
        /* ethernet@wirespeed */
-       bnx2_write_phy(bp, 0x18, 0x7007);
-       bnx2_read_phy(bp, 0x18, &val);
-       bnx2_write_phy(bp, 0x18, val | (1 << 15) | (1 << 4));
+       bnx2_write_phy(bp, MII_BNX2_AUX_CTL, AUX_CTL_MISC_CTL);
+       bnx2_read_phy(bp, MII_BNX2_AUX_CTL, &val);
+       val |=  AUX_CTL_MISC_CTL_WR | AUX_CTL_MISC_CTL_WIRESPEED;
+
+       /* auto-mdix */
+       if (BNX2_CHIP(bp) == BNX2_CHIP_5709)
+               val |=  AUX_CTL_MISC_CTL_AUTOMDIX;
+
+       bnx2_write_phy(bp, MII_BNX2_AUX_CTL, val);
        return 0;
 }
 

diff --git a/drivers/net/ethernet/broadcom/bnx2.h b/drivers/net/ethernet/broadcom/bnx2.h
index 18cb2d23e56b344db90f8c7cef007f02f256f64e..39f40d113254f1030d6256af08e8ffab90b05d99 100644 (file)
--- a/drivers/net/ethernet/broadcom/bnx2.h
+++ b/drivers/net/ethernet/broadcom/bnx2.h
@@ -6471,6 +6471,12 @@ struct l2_fhdr {
 
 #define BCM5708S_TX_ACTL3                      0x17
 
+#define MII_BNX2_AUX_CTL                       0x18
+#define AUX_CTL_MISC_CTL                        0x7007
+#define AUX_CTL_MISC_CTL_WIRESPEED               (1 << 4)
+#define AUX_CTL_MISC_CTL_AUTOMDIX                (1 << 9)
+#define AUX_CTL_MISC_CTL_WR                      (1 << 15)
+
 #define MII_BNX2_DSP_RW_PORT                   0x15
 #define MII_BNX2_DSP_ADDRESS                   0x17
 #define MII_BNX2_DSP_EXPAND_REG                         0x0f00