]> Pileus Git - ~andy/linux/commitdiff
ARM: tegra: use machine specific hook for late init
authorShawn Guo <shawn.guo@linaro.org>
Wed, 2 May 2012 09:08:06 +0000 (17:08 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Tue, 8 May 2012 12:36:36 +0000 (20:36 +0800)
Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/board-dt-tegra30.c
arch/arm/mach-tegra/board-harmony.c
arch/arm/mach-tegra/board-paz00.c
arch/arm/mach-tegra/board-seaboard.c
arch/arm/mach-tegra/board-trimslice.c
arch/arm/mach-tegra/board.h
arch/arm/mach-tegra/clock.c
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/powergate.c

index 0952494f481aa4a7c5dd4f7f6e615b9148f218c1..0f0da6c024599fb823d8793728ed75d65ba86754 100644 (file)
@@ -142,6 +142,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_dt_init,
+       .init_late      = tegra_init_late,
        .restart        = tegra_assert_system_reset,
        .dt_compat      = tegra20_dt_board_compat,
 MACHINE_END
index 5f7c03e972f3dc2654f82022d81129bb5982b0d7..09d21b27bf2fd2d71e7f9caa3a8204782aa97f57 100644 (file)
@@ -80,6 +80,7 @@ DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra30_dt_init,
+       .init_late      = tegra_init_late,
        .restart        = tegra_assert_system_reset,
        .dt_compat      = tegra30_dt_board_compat,
 MACHINE_END
index c00aadb01e097f70e63909e0fd05d43f35f12f44..987115aa4d962fcb61698d34bbbd8c306aa44ea8 100644 (file)
@@ -191,5 +191,6 @@ MACHINE_START(HARMONY, "harmony")
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_harmony_init,
+       .init_late      = tegra_init_late,
        .restart        = tegra_assert_system_reset,
 MACHINE_END
index 330afdfa24754ae773238f45f855db0407c7dd57..2e8a4c61afb22309f8296bbae925af8d12da0054 100644 (file)
@@ -221,5 +221,6 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_paz00_init,
+       .init_late      = tegra_init_late,
        .restart        = tegra_assert_system_reset,
 MACHINE_END
index d669847f0485bdfffaf42e44290154777405f81b..273eaaaf271a2a918dd352c57d13dfe79ec6c097 100644 (file)
@@ -289,6 +289,7 @@ MACHINE_START(SEABOARD, "seaboard")
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_seaboard_init,
+       .init_late      = tegra_init_late,
        .restart        = tegra_assert_system_reset,
 MACHINE_END
 
@@ -300,6 +301,7 @@ MACHINE_START(KAEN, "kaen")
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_kaen_init,
+       .init_late      = tegra_init_late,
        .restart        = tegra_assert_system_reset,
 MACHINE_END
 
@@ -311,5 +313,6 @@ MACHINE_START(WARIO, "wario")
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_wario_init,
+       .init_late      = tegra_init_late,
        .restart        = tegra_assert_system_reset,
 MACHINE_END
index cd52820a3e37a08090080e81f67df568018c9c06..0a2a0e5bd39ed1a70aad1688edf0413741d099ca 100644 (file)
@@ -180,5 +180,6 @@ MACHINE_START(TRIMSLICE, "trimslice")
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_trimslice_init,
+       .init_late      = tegra_init_late,
        .restart        = tegra_assert_system_reset,
 MACHINE_END
index 75d1543d77c0d0f2029191f96fabc07d98c4e8fe..65014968fc6c05ad1144c421856034b40756f037 100644 (file)
@@ -32,5 +32,19 @@ void __init tegra_init_irq(void);
 void __init tegra_dt_init_irq(void);
 int __init tegra_pcie_init(bool init_port0, bool init_port1);
 
+void tegra_init_late(void);
+
+#ifdef CONFIG_DEBUG_FS
+int tegra_clk_debugfs_init(void);
+#else
+static inline int tegra_clk_debugfs_init(void) { return 0; }
+#endif
+
+#if defined(CONFIG_ARCH_TEGRA_2x_SOC) && defined(CONFIG_DEBUG_FS)
+int __init tegra_powergate_debugfs_init(void);
+#else
+static inline int tegra_powergate_debugfs_init(void) { return 0; }
+#endif
+
 extern struct sys_timer tegra_timer;
 #endif
index 8dad8d18cb49cd26e12212718de9295a4f4e550a..58f981c0819c717883ae99c8d9d7d4c825ea1cae 100644 (file)
@@ -642,7 +642,7 @@ static int clk_debugfs_register(struct clk *c)
        return 0;
 }
 
-static int __init clk_debugfs_init(void)
+int __init tegra_clk_debugfs_init(void)
 {
        struct clk *c;
        struct dentry *d;
@@ -669,5 +669,4 @@ err_out:
        return err;
 }
 
-late_initcall(clk_debugfs_init);
 #endif
index 22df10fb9972877069f92637ff5849ba990ad9f7..c90ec9333f96e1e26ee94af691d12c7963755327 100644 (file)
@@ -132,3 +132,9 @@ void __init tegra30_init_early(void)
        tegra_powergate_init();
 }
 #endif
+
+void __init tegra_init_late(void)
+{
+       tegra_clk_debugfs_init();
+       tegra_powergate_debugfs_init();
+}
index c238699ae86f5021defde301911bcde0c0696a0f..f5b12fb4ff12306563fd5da0152230424118a843 100644 (file)
@@ -234,7 +234,7 @@ static const struct file_operations powergate_fops = {
        .release        = single_release,
 };
 
-static int __init powergate_debugfs_init(void)
+int __init tegra_powergate_debugfs_init(void)
 {
        struct dentry *d;
        int err = -ENOMEM;
@@ -247,6 +247,4 @@ static int __init powergate_debugfs_init(void)
        return err;
 }
 
-late_initcall(powergate_debugfs_init);
-
 #endif