ARM: dts: vexpress: disable CA9 core tile sp804 timer

The motherboard sp804 timer is used, but core tile sp804 timer is not.
According to Russell King, the clock configuration is undocumented and
defaults to 32kHz which is not desireable. So mark core tile sp804 timer
as disabled.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
index 1420bb14d95c9bdeecea3aff5598612df359b924..62d9b225dcceec8b27464027cd9dba60640c33f5 100644 (file)
--- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -98,6 +98,7 @@
                             <0 49 4>;
                clocks = <&oscclk2>, <&oscclk2>;
                clock-names = "timclk", "apb_pclk";
+               status = "disabled";
        };
 
        watchdog@100e5000 {