]> Pileus Git - ~andy/linux/commitdiff
Blackfin arch: dont clear status register bits in SWRST so we can actually use it
authorMike Frysinger <michael.frysinger@analog.com>
Mon, 21 May 2007 10:09:23 +0000 (18:09 +0800)
committerLinus Torvalds <torvalds@woody.linux-foundation.org>
Mon, 21 May 2007 16:50:22 +0000 (09:50 -0700)
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
arch/blackfin/mach-bf533/head.S
arch/blackfin/mach-bf537/head.S
arch/blackfin/mach-bf561/head.S

index 4808edb0680f8723ffe151ccac2470bee5d981e2..7cb8258841d4d7eb66712281dbfbb0b57d7b8432 100644 (file)
@@ -468,12 +468,6 @@ ENTRY(_bfin_reset)
        w[p0] = r0.l;
 #endif
 
-       /* Clear the bits 13-15 in SWRST if they werent cleared */
-       p0.h = hi(SWRST);
-       p0.l = lo(SWRST);
-       csync;
-       r0.l = w[p0];
-
        /* Clear the IMASK register */
        p0.h = hi(IMASK);
        p0.l = lo(IMASK);
index d104e1d8e07a3854914adc3a2530c7616c2951d7..de78e4281aefeee6d3d5559cf534328ae734c526 100644 (file)
@@ -504,12 +504,6 @@ _delay_lab1_end:
        nop;
 #endif
 
-       /* Clear the bits 13-15 in SWRST if they werent cleared */
-       p0.h = hi(SWRST);
-       p0.l = lo(SWRST);
-       csync;
-       r0.l = w[p0];
-
        /* Clear the IMASK register */
        p0.h = hi(IMASK);
        p0.l = lo(IMASK);
index 7bca478526b9f0a95bc4c37882dc7144b62e61da..462c39ed8ec5bcf66eb1091c8e1fd8fbc9636b3d 100644 (file)
@@ -414,12 +414,6 @@ ENTRY(_bfin_reset)
        w[p0] = r0.l;
 #endif
 
-       /* Clear the bits 13-15 in SWRST if they werent cleared */
-       p0.h = hi(SICA_SWRST);
-       p0.l = lo(SICA_SWRST);
-       csync;
-       r0.l = w[p0];
-
        /* Clear the IMASK register */
        p0.h = hi(IMASK);
        p0.l = lo(IMASK);