]> Pileus Git - ~andy/linux/commitdiff
ARM: dts: add clock provider information for all controllers in Exynos5250 SoC
authorThomas Abraham <thomas.abraham@linaro.org>
Sat, 9 Mar 2013 08:18:14 +0000 (17:18 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Mon, 25 Mar 2013 09:18:31 +0000 (18:18 +0900)
For all supported peripheral controllers on Exynos5250, add clock
lookup information.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/boot/dts/exynos5250.dtsi

index 0fcabd711ec9ee6e5a6f086905e4abebb1cc864d..f8c9964f367c95fffecea0160068d36fe0387144 100644 (file)
@@ -93,6 +93,8 @@
                interrupt-parent = <&mct_map>;
                interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
                             <4 0>, <5 0>;
+               clocks = <&clock 1>, <&clock 335>;
+               clock-names = "fin_pll", "mct";
 
                mct_map: mct-map {
                        #interrupt-cells = <2>;
                compatible = "samsung,s3c2410-wdt";
                reg = <0x101D0000 0x100>;
                interrupts = <0 42 0>;
+               clocks = <&clock 336>;
+               clock-names = "watchdog";
        };
 
        codec@11000000 {
                compatible = "samsung,s3c6410-rtc";
                reg = <0x101E0000 0x100>;
                interrupts = <0 43 0>, <0 44 0>;
+               clocks = <&clock 337>;
+               clock-names = "rtc";
        };
 
        tmu@10060000 {
                compatible = "samsung,exynos5250-tmu";
                reg = <0x10060000 0x100>;
                interrupts = <0 65 0>;
+               clocks = <&clock 338>;
+               clock-names = "tmu_apbif";
        };
 
        serial@12C00000 {
                compatible = "samsung,exynos4210-uart";
                reg = <0x12C00000 0x100>;
                interrupts = <0 51 0>;
+               clocks = <&clock 289>, <&clock 146>;
+               clock-names = "uart", "clk_uart_baud0";
        };
 
        serial@12C10000 {
                compatible = "samsung,exynos4210-uart";
                reg = <0x12C10000 0x100>;
                interrupts = <0 52 0>;
+               clocks = <&clock 290>, <&clock 147>;
+               clock-names = "uart", "clk_uart_baud0";
        };
 
        serial@12C20000 {
                compatible = "samsung,exynos4210-uart";
                reg = <0x12C20000 0x100>;
                interrupts = <0 53 0>;
+               clocks = <&clock 291>, <&clock 148>;
+               clock-names = "uart", "clk_uart_baud0";
        };
 
        serial@12C30000 {
                compatible = "samsung,exynos4210-uart";
                reg = <0x12C30000 0x100>;
                interrupts = <0 54 0>;
+               clocks = <&clock 292>, <&clock 149>;
+               clock-names = "uart", "clk_uart_baud0";
        };
 
        sata@122F0000 {
                compatible = "samsung,exynos5-sata-ahci";
                reg = <0x122F0000 0x1ff>;
                interrupts = <0 115 0>;
+               clocks = <&clock 277>, <&clock 143>;
+               clock-names = "sata", "sclk_sata";
        };
 
        sata-phy@12170000 {
                interrupts = <0 56 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 294>;
+               clock-names = "i2c";
        };
 
        i2c_1: i2c@12C70000 {
                interrupts = <0 57 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 295>;
+               clock-names = "i2c";
        };
 
        i2c_2: i2c@12C80000 {
                interrupts = <0 58 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 296>;
+               clock-names = "i2c";
        };
 
        i2c_3: i2c@12C90000 {
                interrupts = <0 59 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 297>;
+               clock-names = "i2c";
        };
 
        i2c_4: i2c@12CA0000 {
                interrupts = <0 60 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 298>;
+               clock-names = "i2c";
        };
 
        i2c_5: i2c@12CB0000 {
                interrupts = <0 61 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 299>;
+               clock-names = "i2c";
        };
 
        i2c_6: i2c@12CC0000 {
                interrupts = <0 62 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 300>;
+               clock-names = "i2c";
        };
 
        i2c_7: i2c@12CD0000 {
                interrupts = <0 63 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 301>;
+               clock-names = "i2c";
        };
 
        i2c_8: i2c@12CE0000 {
                interrupts = <0 64 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 302>;
+               clock-names = "i2c";
        };
 
        i2c@121D0000 {
                 reg = <0x121D0000 0x100>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+               clocks = <&clock 288>;
+               clock-names = "i2c";
        };
 
        spi_0: spi@12d20000 {
                dma-names = "tx", "rx";
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 304>, <&clock 154>;
+               clock-names = "spi", "spi_busclk0";
        };
 
        spi_1: spi@12d30000 {
                dma-names = "tx", "rx";
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 305>, <&clock 155>;
+               clock-names = "spi", "spi_busclk0";
        };
 
        spi_2: spi@12d40000 {
                dma-names = "tx", "rx";
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 306>, <&clock 156>;
+               clock-names = "spi", "spi_busclk0";
        };
 
        dwmmc_0: dwmmc0@12200000 {
                interrupts = <0 75 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 280>, <&clock 139>;
+               clock-names = "biu", "ciu";
        };
 
        dwmmc_1: dwmmc1@12210000 {
                interrupts = <0 76 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 281>, <&clock 140>;
+               clock-names = "biu", "ciu";
        };
 
        dwmmc_2: dwmmc2@12220000 {
                interrupts = <0 77 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 282>, <&clock 141>;
+               clock-names = "biu", "ciu";
        };
 
        dwmmc_3: dwmmc3@12230000 {
                interrupts = <0 78 0>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&clock 283>, <&clock 142>;
+               clock-names = "biu", "ciu";
        };
 
        i2s0: i2s@03830000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x121A0000 0x1000>;
                        interrupts = <0 34 0>;
+                       clocks = <&clock 275>;
+                       clock-names = "apb_pclk";
                        #dma-cells = <1>;
                        #dma-channels = <8>;
                        #dma-requests = <32>;
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x121B0000 0x1000>;
                        interrupts = <0 35 0>;
+                       clocks = <&clock 276>;
+                       clock-names = "apb_pclk";
                        #dma-cells = <1>;
                        #dma-channels = <8>;
                        #dma-requests = <32>;
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x10800000 0x1000>;
                        interrupts = <0 33 0>;
+                       clocks = <&clock 271>;
+                       clock-names = "apb_pclk";
                        #dma-cells = <1>;
                        #dma-channels = <8>;
                        #dma-requests = <1>;
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x11C10000 0x1000>;
                        interrupts = <0 124 0>;
+                       clocks = <&clock 271>;
+                       clock-names = "apb_pclk";
                        #dma-cells = <1>;
                        #dma-channels = <8>;
                        #dma-requests = <1>;
                reg = <0x13e00000 0x1000>;
                interrupts = <0 85 0>;
                samsung,power-domain = <&pd_gsc>;
+               clocks = <&clock 256>;
+               clock-names = "gscl";
        };
 
        gsc_1:  gsc@0x13e10000 {
                reg = <0x13e10000 0x1000>;
                interrupts = <0 86 0>;
                samsung,power-domain = <&pd_gsc>;
+               clocks = <&clock 257>;
+               clock-names = "gscl";
        };
 
        gsc_2:  gsc@0x13e20000 {
                reg = <0x13e20000 0x1000>;
                interrupts = <0 87 0>;
                samsung,power-domain = <&pd_gsc>;
+               clocks = <&clock 258>;
+               clock-names = "gscl";
        };
 
        gsc_3:  gsc@0x13e30000 {
                reg = <0x13e30000 0x1000>;
                interrupts = <0 88 0>;
                samsung,power-domain = <&pd_gsc>;
+               clocks = <&clock 259>;
+               clock-names = "gscl";
        };
 
        hdmi {
                compatible = "samsung,exynos5-hdmi";
                reg = <0x14530000 0x70000>;
                interrupts = <0 95 0>;
+               clocks = <&clock 333>, <&clock 136>, <&clock 137>,
+                               <&clock 333>, <&clock 333>;
+               clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
+                               "sclk_hdmiphy", "hdmiphy";
        };
 
        mixer {