]> Pileus Git - ~andy/linux/commitdiff
ARM/ARM64: arch_timer: add macros for bits in control register
authorSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Tue, 13 Aug 2013 12:43:26 +0000 (13:43 +0100)
committerSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Thu, 26 Sep 2013 08:47:06 +0000 (09:47 +0100)
Add macros to describe the bitfields in the ARM architected timer
control register to make code easy to understand.

Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
arch/arm/include/asm/arch_timer.h
arch/arm64/include/asm/arch_timer.h
include/clocksource/arm_arch_timer.h

index 5665134bfa3ef28043fb7a41c9843cfa8669f465..d57e04de8e8c4e32f3f3050650b91bf4b50c7d4a 100644 (file)
@@ -93,8 +93,13 @@ static inline void arch_counter_set_user_access(void)
 
        asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl));
 
-       /* disable user access to everything */
-       cntkctl &= ~((3 << 8) | (7 << 0));
+       /* Disable user access to both physical/virtual counters/timers */
+       /* Also disable virtual event stream */
+       cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
+                       | ARCH_TIMER_USR_VT_ACCESS_EN
+                       | ARCH_TIMER_VIRT_EVT_EN
+                       | ARCH_TIMER_USR_VCT_ACCESS_EN
+                       | ARCH_TIMER_USR_PCT_ACCESS_EN);
 
        asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));
 }
index c9f1d2816c2bb9086be3b2e001c5d81921a076bf..2b9722f42729e2eaf80d011e59776dc7747f415d 100644 (file)
@@ -96,12 +96,16 @@ static inline void arch_counter_set_user_access(void)
 {
        u32 cntkctl;
 
-       /* Disable user access to the timers and the physical counter. */
        asm volatile("mrs       %0, cntkctl_el1" : "=r" (cntkctl));
-       cntkctl &= ~((3 << 8) | (1 << 0));
 
-       /* Enable user access to the virtual counter and frequency. */
-       cntkctl |= (1 << 1);
+       /* Disable user access to the timers and the physical counter */
+       cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
+                       | ARCH_TIMER_USR_VT_ACCESS_EN
+                       | ARCH_TIMER_USR_PCT_ACCESS_EN);
+
+       /* Enable user access to the virtual counter */
+       cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN;
+
        asm volatile("msr       cntkctl_el1, %0" : : "r" (cntkctl));
 }
 
index 93b7f96f9c59f354be61ce529f90f8fda305f376..8707dae4cee264653864ff27d76bd4967795b945 100644 (file)
@@ -33,6 +33,14 @@ enum arch_timer_reg {
 #define ARCH_TIMER_MEM_PHYS_ACCESS     2
 #define ARCH_TIMER_MEM_VIRT_ACCESS     3
 
+#define ARCH_TIMER_USR_PCT_ACCESS_EN   (1 << 0) /* physical counter */
+#define ARCH_TIMER_USR_VCT_ACCESS_EN   (1 << 1) /* virtual counter */
+#define ARCH_TIMER_VIRT_EVT_EN         (1 << 2)
+#define ARCH_TIMER_EVT_TRIGGER_SHIFT   (4)
+#define ARCH_TIMER_EVT_TRIGGER_MASK    (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT)
+#define ARCH_TIMER_USR_VT_ACCESS_EN    (1 << 8) /* virtual timer registers */
+#define ARCH_TIMER_USR_PT_ACCESS_EN    (1 << 9) /* physical timer registers */
+
 #ifdef CONFIG_ARM_ARCH_TIMER
 
 extern u32 arch_timer_get_rate(void);