]> Pileus Git - ~andy/linux/commitdiff
ARM: dts: Add DP controller DT node to exynos5420 SoC
authorVikas Sajjan <vikas.sajjan@linaro.org>
Wed, 14 Aug 2013 08:15:06 +0000 (17:15 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Sun, 18 Aug 2013 16:56:31 +0000 (01:56 +0900)
Adds DP controller DT node to exynos5420 SoC

Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/boot/dts/exynos5420-smdk5420.dts
arch/arm/boot/dts/exynos5420.dtsi

index 0c0249c80bb867f2cfa7f1424521c4777f657b66..ce7bb64fa117f1d9ea7b7bd96c0f80d6d9bd6f76 100644 (file)
                };
        };
 
+       dp-controller@145B0000 {
+               samsung,color-space = <0>;
+               samsung,dynamic-range = <0>;
+               samsung,ycbcr-coeff = <0>;
+               samsung,color-depth = <1>;
+               samsung,link-rate = <0x0a>;
+               samsung,lane-count = <4>;
+               status = "okay";
+       };
+
        fimd@14400000 {
                status = "okay";
                display-timings {
index 2f98c89c8a03d10baa1d4426aa0283845a856905..b1a70376bcc99c07c1d47b5b311586b638637026 100644 (file)
                clock-names = "uart", "clk_uart_baud0";
        };
 
+       dp_phy: video-phy@10040728 {
+               compatible = "samsung,exynos5250-dp-video-phy";
+               reg = <0x10040728 4>;
+               #phy-cells = <0>;
+       };
+
+       dp-controller@145B0000 {
+               clocks = <&clock 412>;
+               clock-names = "dp";
+               phys = <&dp_phy>;
+               phy-names = "dp";
+       };
+
        fimd@14400000 {
                samsung,power-domain = <&disp_pd>;
                clocks = <&clock 147>, <&clock 421>;
                clock-names = "sclk_fimd", "fimd";
        };
-
 };