]> Pileus Git - ~andy/linux/commitdiff
ARM: Tegra: Force PORT_TEGRA as the UART type
authorStephen Warren <swarren@nvidia.com>
Mon, 8 Aug 2011 21:01:05 +0000 (15:01 -0600)
committerOlof Johansson <olof@lixom.net>
Tue, 9 Aug 2011 19:08:07 +0000 (12:08 -0700)
8250.c recently gained an explicit PORT_TEGRA port type. Specifically
request this in all Tegra boards' UART platform data.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/mach-tegra/board-harmony.c
arch/arm/mach-tegra/board-paz00.c
arch/arm/mach-tegra/board-seaboard.c
arch/arm/mach-tegra/board-trimslice.c

index f528a5a192a6019fce05ffb4219f0c209bb0d19c..987dab527e8ce1af6e53e8b00235d222cdec3d8f 100644 (file)
@@ -49,7 +49,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
                .membase        = IO_ADDRESS(TEGRA_UARTD_BASE),
                .mapbase        = TEGRA_UARTD_BASE,
                .irq            = INT_UARTD,
-               .flags          = UPF_BOOT_AUTOCONF,
+               .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
+               .type           = PORT_TEGRA,
                .iotype         = UPIO_MEM,
                .regshift       = 2,
                .uartclk        = 216000000,
index 51d847f7fca9a18928a0ef1aec7e57c9488d85ed..7630c239e7a96f0cf6d990855865bdcbedcec065 100644 (file)
@@ -50,7 +50,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
                .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
                .mapbase        = TEGRA_UARTA_BASE,
                .irq            = INT_UARTA,
-               .flags          = UPF_BOOT_AUTOCONF,
+               .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
+               .type           = PORT_TEGRA,
                .iotype         = UPIO_MEM,
                .regshift       = 2,
                .uartclk        = 216000000,
@@ -59,7 +60,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
                .membase        = IO_ADDRESS(TEGRA_UARTD_BASE),
                .mapbase        = TEGRA_UARTD_BASE,
                .irq            = INT_UARTD,
-               .flags          = UPF_BOOT_AUTOCONF,
+               .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
+               .type           = PORT_TEGRA,
                .iotype         = UPIO_MEM,
                .regshift       = 2,
                .uartclk        = 216000000,
index 237a94a1f44a86df088ec46663af119f79da18f9..25446df00006774eb81cfdb997cc3460fdfc5a8c 100644 (file)
@@ -44,7 +44,8 @@
 static struct plat_serial8250_port debug_uart_platform_data[] = {
        {
                /* Memory and IRQ filled in before registration */
-               .flags          = UPF_BOOT_AUTOCONF,
+               .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
+               .type           = PORT_TEGRA,
                .iotype         = UPIO_MEM,
                .regshift       = 2,
                .uartclk        = 216000000,
index 89a6d2adc1dedb61d329f54d5beb10a4d5eadc54..91875b975563fb3ec3eb1641d4be8853d6080755 100644 (file)
@@ -46,7 +46,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
                .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
                .mapbase        = TEGRA_UARTA_BASE,
                .irq            = INT_UARTA,
-               .flags          = UPF_BOOT_AUTOCONF,
+               .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
+               .type           = PORT_TEGRA,
                .iotype         = UPIO_MEM,
                .regshift       = 2,
                .uartclk        = 216000000,