]> Pileus Git - ~andy/linux/commitdiff
[media] s5p-fimc: fix the value of YUV422 1-plane formats
authorHyunwoong Kim <khw0178.kim@samsung.com>
Wed, 22 Dec 2010 03:56:05 +0000 (00:56 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Mon, 21 Mar 2011 23:31:39 +0000 (20:31 -0300)
Some color formats are mismatched in s5p-fimc driver.
CIOCTRL[1:0], order422_out, should be set 2b'00 not 2b'11
to use V4L2_PIX_FMT_YUYV. Because in V4L2 standard V4L2_PIX_FMT_YUYV means
"start + 0: Y'00 Cb00 Y'01 Cr00 Y'02 Cb01 Y'03 Cr01". According to datasheet
2b'00 is right value for V4L2_PIX_FMT_YUYV.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
drivers/media/video/s5p-fimc/fimc-core.c
drivers/media/video/s5p-fimc/fimc-core.h
drivers/media/video/s5p-fimc/regs-fimc.h

index db249e6c355d53ccb4b84f6824156d457c318071..70d6b4c9760fb8569aa70c837cee9f7859c0fe07 100644 (file)
@@ -450,34 +450,34 @@ static void fimc_set_yuv_order(struct fimc_ctx *ctx)
        /* Set order for 1 plane input formats. */
        switch (ctx->s_frame.fmt->color) {
        case S5P_FIMC_YCRYCB422:
-               ctx->in_order_1p = S5P_FIMC_IN_YCRYCB;
+               ctx->in_order_1p = S5P_MSCTRL_ORDER422_CBYCRY;
                break;
        case S5P_FIMC_CBYCRY422:
-               ctx->in_order_1p = S5P_FIMC_IN_CBYCRY;
+               ctx->in_order_1p = S5P_MSCTRL_ORDER422_YCRYCB;
                break;
        case S5P_FIMC_CRYCBY422:
-               ctx->in_order_1p = S5P_FIMC_IN_CRYCBY;
+               ctx->in_order_1p = S5P_MSCTRL_ORDER422_YCBYCR;
                break;
        case S5P_FIMC_YCBYCR422:
        default:
-               ctx->in_order_1p = S5P_FIMC_IN_YCBYCR;
+               ctx->in_order_1p = S5P_MSCTRL_ORDER422_CRYCBY;
                break;
        }
        dbg("ctx->in_order_1p= %d", ctx->in_order_1p);
 
        switch (ctx->d_frame.fmt->color) {
        case S5P_FIMC_YCRYCB422:
-               ctx->out_order_1p = S5P_FIMC_OUT_YCRYCB;
+               ctx->out_order_1p = S5P_CIOCTRL_ORDER422_CBYCRY;
                break;
        case S5P_FIMC_CBYCRY422:
-               ctx->out_order_1p = S5P_FIMC_OUT_CBYCRY;
+               ctx->out_order_1p = S5P_CIOCTRL_ORDER422_YCRYCB;
                break;
        case S5P_FIMC_CRYCBY422:
-               ctx->out_order_1p = S5P_FIMC_OUT_CRYCBY;
+               ctx->out_order_1p = S5P_CIOCTRL_ORDER422_YCBYCR;
                break;
        case S5P_FIMC_YCBYCR422:
        default:
-               ctx->out_order_1p = S5P_FIMC_OUT_YCBYCR;
+               ctx->out_order_1p = S5P_CIOCTRL_ORDER422_CRYCBY;
                break;
        }
        dbg("ctx->out_order_1p= %d", ctx->out_order_1p);
index 1c6aa6924550a17e8971ac7d343f21347e31a14e..562d15d7059a8c3ef0ab3880b9d992289100e55e 100644 (file)
@@ -99,18 +99,6 @@ enum fimc_color_fmt {
 
 #define fimc_fmt_is_rgb(x) ((x) & 0x10)
 
-/* Y/Cb/Cr components order at DMA output for 1 plane YCbCr 4:2:2 formats. */
-#define        S5P_FIMC_OUT_CRYCBY     S5P_CIOCTRL_ORDER422_CRYCBY
-#define        S5P_FIMC_OUT_CBYCRY     S5P_CIOCTRL_ORDER422_YCRYCB
-#define        S5P_FIMC_OUT_YCRYCB     S5P_CIOCTRL_ORDER422_CBYCRY
-#define        S5P_FIMC_OUT_YCBYCR     S5P_CIOCTRL_ORDER422_YCBYCR
-
-/* Input Y/Cb/Cr components order for 1 plane YCbCr 4:2:2 color formats. */
-#define        S5P_FIMC_IN_CRYCBY      S5P_MSCTRL_ORDER422_CRYCBY
-#define        S5P_FIMC_IN_CBYCRY      S5P_MSCTRL_ORDER422_YCRYCB
-#define        S5P_FIMC_IN_YCRYCB      S5P_MSCTRL_ORDER422_CBYCRY
-#define        S5P_FIMC_IN_YCBYCR      S5P_MSCTRL_ORDER422_YCBYCR
-
 /* Cb/Cr chrominance components order for 2 plane Y/CbCr 4:2:2 formats. */
 #define        S5P_FIMC_LSB_CRCB       S5P_CIOCTRL_ORDER422_2P_LSB_CRCB
 
index 74ca705df76530c0f3f6a2db0e84e86f0db6b680..fe19b4b0fb6a68d2eb50f9e0bcba1ab68bb2fc78 100644 (file)
@@ -98,8 +98,8 @@
 #define S5P_CIOCTRL                    0x4c
 #define S5P_CIOCTRL_ORDER422_MASK      (3 << 0)
 #define S5P_CIOCTRL_ORDER422_CRYCBY    (0 << 0)
-#define S5P_CIOCTRL_ORDER422_YCRYCB    (1 << 0)
-#define S5P_CIOCTRL_ORDER422_CBYCRY    (2 << 0)
+#define S5P_CIOCTRL_ORDER422_CBYCRY    (1 << 0)
+#define S5P_CIOCTRL_ORDER422_YCRYCB    (2 << 0)
 #define S5P_CIOCTRL_ORDER422_YCBYCR    (3 << 0)
 #define S5P_CIOCTRL_LASTIRQ_ENABLE     (1 << 2)
 #define S5P_CIOCTRL_YCBCR_3PLANE       (0 << 3)
 #define S5P_MSCTRL_FLIP_Y_MIRROR       (2 << 13)
 #define S5P_MSCTRL_FLIP_180            (3 << 13)
 #define S5P_MSCTRL_ORDER422_SHIFT      4
-#define S5P_MSCTRL_ORDER422_CRYCBY     (0 << 4)
-#define S5P_MSCTRL_ORDER422_YCRYCB     (1 << 4)
-#define S5P_MSCTRL_ORDER422_CBYCRY     (2 << 4)
-#define S5P_MSCTRL_ORDER422_YCBYCR     (3 << 4)
+#define S5P_MSCTRL_ORDER422_YCBYCR     (0 << 4)
+#define S5P_MSCTRL_ORDER422_CBYCRY     (1 << 4)
+#define S5P_MSCTRL_ORDER422_YCRYCB     (2 << 4)
+#define S5P_MSCTRL_ORDER422_CRYCBY     (3 << 4)
 #define S5P_MSCTRL_ORDER422_MASK       (3 << 4)
 #define S5P_MSCTRL_INPUT_EXTCAM                (0 << 3)
 #define S5P_MSCTRL_INPUT_MEMORY                (1 << 3)