arm/tegra: convert tegra20 to GIC devicetree binding

Convert tegra20 IRQ intialization to the GIC devicetree binding. Modify the
interrupt definitions in the dts files according to
Documentation/devicetree/bindings/arm/gic.txt

v3 (swarren):
* Moved of_irq_init() call into board-dt.c to avoid ifdef'ing it.
  - Even with a dummy replacement if !CONFIG_OF, the reference from
    tegra_dt_irq_match[] to gic_of_init() would still have to be ifdef'd
  - It's plausible that tegra_dt_irq_match[] may need to contain more
    entries in the future, and defining what they are seems more suitable
    for board-dt.c than irq.c
v2 (swarren):
* Removed some stale GIC init code from board-dt.c
* Undid some accidental 0x -> 0x0 search/replace.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
[olof: added include of <asm/hardware/gic.h> for compile to pass]
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
index 4f6a8aa0a757f7716df4683d9f2a0758331b516e..1a1d7023b69b427bda55a11b0dff61e8849e001b 100644 (file)
--- a/arch/arm/boot/dts/tegra-paz00.dts
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -27,7 +27,7 @@
                #size-cells = <0>;
                compatible = "nvidia,nvec";
                reg = <0x7000C500 0x100>;
-               interrupts = <124>;
+               interrupts = <0 92 0x04>;
                clock-frequency = <80000>;
                request-gpios = <&gpio 170 0>;
                slave-addr = <138>;

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 04068dd49286a44d5977b69e6e348ae3d3758df3..660c8ad537c01917b13dde8ed8117d9972fba92d 100644 (file)
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -5,9 +5,9 @@
        interrupt-parent = <&intc>;
 
        intc: interrupt-controller@50041000 {
-               compatible = "nvidia,tegra20-gic";
+               compatible = "arm,cortex-a9-gic";
                interrupt-controller;
-               #interrupt-cells = <1>;
+               #interrupt-cells = <3>;
                reg = < 0x50041000 0x1000 >,
                      < 0x50040100 0x0100 >;
        };
@@ -17,7 +17,7 @@
                #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000C000 0x100>;
-               interrupts = < 70 >;
+               interrupts = < 0 38 0x04 >;
        };
 
        i2c@7000c400 {
@@ -25,7 +25,7 @@
                #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000C400 0x100>;
-               interrupts = < 116 >;
+               interrupts = < 0 84 0x04 >;
        };
 
        i2c@7000c500 {
@@ -33,7 +33,7 @@
                #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000C500 0x100>;
-               interrupts = < 124 >;
+               interrupts = < 0 92 0x04 >;
        };
 
        i2c@7000d000 {
@@ -41,20 +41,20 @@
                #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000D000 0x200>;
-               interrupts = < 85 >;
+               interrupts = < 0 53 0x04 >;
        };
 
        i2s@70002800 {
                compatible = "nvidia,tegra20-i2s";
                reg = <0x70002800 0x200>;
-               interrupts = < 45 >;
+               interrupts = < 0 13 0x04 >;
                dma-channel = < 2 >;
        };
 
        i2s@70002a00 {
                compatible = "nvidia,tegra20-i2s";
                reg = <0x70002a00 0x200>;
-               interrupts = < 35 >;
+               interrupts = < 0 3 0x04 >;
                dma-channel = < 1 >;
        };
 
@@ -66,7 +66,13 @@
        gpio: gpio@6000d000 {
                compatible = "nvidia,tegra20-gpio";
                reg = < 0x6000d000 0x1000 >;
-               interrupts = < 64 65 66 67 87 119 121 >;
+               interrupts = < 0 32 0x04
+                              0 33 0x04
+                              0 34 0x04
+                              0 35 0x04
+                              0 55 0x04
+                              0 87 0x04
+                              0 89 0x04 >;
                #gpio-cells = <2>;
                gpio-controller;
        };
@@ -83,79 +89,79 @@
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006000 0x40>;
                reg-shift = <2>;
-               interrupts = < 68 >;
+               interrupts = < 0 36 0x04 >;
        };
 
        serial@70006040 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006040 0x40>;
                reg-shift = <2>;
-               interrupts = < 69 >;
+               interrupts = < 0 37 0x04 >;
        };
 
        serial@70006200 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006200 0x100>;
                reg-shift = <2>;
-               interrupts = < 78 >;
+               interrupts = < 0 46 0x04 >;
        };
 
        serial@70006300 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006300 0x100>;
                reg-shift = <2>;
-               interrupts = < 122 >;
+               interrupts = < 0 90 0x04 >;
        };
 
        serial@70006400 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006400 0x100>;
                reg-shift = <2>;
-               interrupts = < 123 >;
+               interrupts = < 0 91 0x04 >;
        };
 
        sdhci@c8000000 {
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000000 0x200>;
-               interrupts = < 46 >;
+               interrupts = < 0 14 0x04 >;
        };
 
        sdhci@c8000200 {
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000200 0x200>;
-               interrupts = < 47 >;
+               interrupts = < 0 15 0x04 >;
        };
 
        sdhci@c8000400 {
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000400 0x200>;
-               interrupts = < 51 >;
+               interrupts = < 0 19 0x04 >;
        };
 
        sdhci@c8000600 {
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000600 0x200>;
-               interrupts = < 63 >;
+               interrupts = < 0 31 0x04 >;
        };
 
        usb@c5000000 {
                compatible = "nvidia,tegra20-ehci", "usb-ehci";
                reg = <0xc5000000 0x4000>;
-               interrupts = < 52 >;
+               interrupts = < 0 20 0x04 >;
                phy_type = "utmi";
        };
 
        usb@c5004000 {
                compatible = "nvidia,tegra20-ehci", "usb-ehci";
                reg = <0xc5004000 0x4000>;
-               interrupts = < 53 >;
+               interrupts = < 0 21 0x04 >;
                phy_type = "ulpi";
        };
 
        usb@c5008000 {
                compatible = "nvidia,tegra20-ehci", "usb-ehci";
                reg = <0xc5008000 0x4000>;
-               interrupts = < 129 >;
+               interrupts = < 0 97 0x04 >;
                phy_type = "utmi";
        };
 };

diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index ba27c13e44e0b2b243c543290167dbb6b342a814..2fa599da7deb631f73e8da6356c220ad5305d02b 100644 (file)
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -36,6 +36,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/setup.h>
+#include <asm/hardware/gic.h>
 
 #include <mach/iomap.h>
 #include <mach/irqs.h>
@@ -51,6 +52,17 @@ void seaboard_pinmux_init(void);
 void trimslice_pinmux_init(void);
 void ventana_pinmux_init(void);
 
+static const struct of_device_id tegra_dt_irq_match[] __initconst = {
+       { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
+       { }
+};
+
+void __init tegra_dt_init_irq(void)
+{
+       tegra_init_irq();
+       of_irq_init(tegra_dt_irq_match);
+}
+
 struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
@@ -91,11 +103,6 @@ static struct of_device_id tegra_dt_match_table[] __initdata = {
        {}
 };
 
-static struct of_device_id tegra_dt_gic_match[] __initdata = {
-       { .compatible = "nvidia,tegra20-gic", },
-       {}
-};
-
 static struct {
        char *machine;
        void (*init)(void);
@@ -109,14 +116,8 @@ static struct {
 
 static void __init tegra_dt_init(void)
 {
-       struct device_node *node;
        int i;
 
-       node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match,
-                                               TEGRA_ARM_INT_DIST_BASE);
-       if (node)
-               irq_domain_add_simple(node, INT_GIC_BASE);
-
        tegra_clk_init_from_table(tegra_dt_clk_init_table);
 
        /*
@@ -149,7 +150,7 @@ static const char * tegra_dt_board_compat[] = {
 DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
-       .init_irq       = tegra_init_irq,
+       .init_irq       = tegra_dt_init_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_dt_init,
        .dt_compat      = tegra_dt_board_compat,

diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index 4956c3cea73172923cff3f2166eff9711a727e1c..004b0fdf0d76178cd5f037deeec55bdbb0a39494 100644 (file)
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -21,6 +21,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/of.h>
 
 #include <asm/hardware/gic.h>
 
@@ -129,6 +130,11 @@ void __init tegra_init_irq(void)
        gic_arch_extn.irq_unmask = tegra_unmask;
        gic_arch_extn.irq_retrigger = tegra_retrigger;
 
-       gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE),
-                IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
+       /*
+        * Check if there is a devicetree present, since the GIC will be
+        * initialized elsewhere under DT.
+        */
+       if (!of_have_populated_dt())
+               gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE),
+                       IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
 }