driver:stmmac: Adjust time stamp increase for 0.465 ns accurate only when Time stamp...

The synopsys spec says When TSCRLSSR is cleard, the rollover value of
sub-second register is 0x7FFFFFFF(0.465 ns per clock).

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
index def7e75e1d5797979a2597eb6c8f705c7ec6f711..76ad214b403694fa56790c478dc310251cdc4288 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
@@ -45,8 +45,8 @@ static void stmmac_config_sub_second_increment(void __iomem *ioaddr)
        data = (1000000000ULL / 50000000);
 
        /* 0.465ns accuracy */
-       if (value & PTP_TCR_TSCTRLSSR)
-               data = (data * 100) / 465;
+       if (!(value & PTP_TCR_TSCTRLSSR))
+               data = (data * 1000) / 465;
 
        writel(data, ioaddr + PTP_SSIR);
 }