]> Pileus Git - ~andy/linux/commit
ARM: 7725/1: mmc: mmci: Cache MMCIDATACTRL register
authorUlf Hansson <ulf.hansson@linaro.org>
Wed, 15 May 2013 19:48:23 +0000 (20:48 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 22 May 2013 23:09:15 +0000 (00:09 +0100)
commit9cc639a20fdc0b935e55d4992f93963f95233ca4
treeb1a48ccf64e34f86f23d6ce944d6cfafbbb4723d
parent0f3ed7f75cf1a16df9309f3a9ffaf62a3fc1f0bb
ARM: 7725/1: mmc: mmci: Cache MMCIDATACTRL register

Add a cache variable in the host struct that reflects the current data in
the MMCIDATACTRL register. This patch will not introduce any functional
change but instead provide an easy option to keep specific bits in the
register between each data transfer.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/mmc/host/mmci.c
drivers/mmc/host/mmci.h