Pileus Git - ~andy/linux/commit

author	Jason Liu <r64343@freescale.com>
	Mon, 16 Sep 2013 01:29:03 +0000 (09:29 +0800)
committer	Shawn Guo <shawn.guo@linaro.org>
	Tue, 17 Sep 2013 02:04:24 +0000 (10:04 +0800)
commit	9779f0e1d75c99c79000ed9e303287fc23da3e9e
tree	8c987ebeb37f3eff41141aa38233e74d04c1696d	tree \| snapshot
parent	6a030ee36a3c3ed5f08a330e88060a6b71e6c7e3	commit \| diff

ARM: imx: i.mx6d/q: disable the double linefill feature of PL310

The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
But according to ARM PL310 errata: 752271
ID: 752271: Double linefill feature can cause data corruption
Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2
Workaround: The only workaround to this erratum is to disable the
double linefill feature. This is the default behavior.

without this patch, you will meet the following error when run the
memtester application at: http://pyropus.ca/software/memtester/

FAILURE: 0x00100000 != 0x00200000 at offset 0x01365664.
FAILURE: 0x00100000 != 0x00200000 at offset 0x01365668.
FAILURE: 0x00100000 != 0x00200000 at offset 0x0136566c.
FAILURE: 0x00100000 != 0x00200000 at offset 0x01365670.
FAILURE: 0x00100000 != 0x00200000 at offset 0x01365674.
FAILURE: 0x00100000 != 0x00200000 at offset 0x01365678.

Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>