]> Pileus Git - ~andy/linux/commit
KVM: ARM: fix the size of TTBCR_{T0SZ,T1SZ} masks
authorJonathan Austin <jonathan.austin@arm.com>
Thu, 26 Sep 2013 15:49:26 +0000 (16:49 +0100)
committerChristoffer Dall <christoffer.dall@linaro.org>
Sun, 13 Oct 2013 00:44:39 +0000 (17:44 -0700)
commit5e497046f005528464f9600a4ee04f49df713596
treed82a1518b583953f5f34c7b824c851ae5c57830b
parent1158fca401e09665c440a9fe4fd4f131ee85c13b
KVM: ARM: fix the size of TTBCR_{T0SZ,T1SZ} masks

The T{0,1}SZ fields of TTBCR are 3 bits wide when using the long descriptor
format. Likewise, the T0SZ field of the HTCR is 3-bits. KVM currently
defines TTBCR_T{0,1}SZ as 3, not 7.

The T0SZ mask is used to calculate the value for the HTCR, both to pick out
TTBCR.T0SZ and mask off the equivalent field in the HTCR during
read-modify-write. The incorrect mask size causes the (UNKNOWN) reset value
of HTCR.T0SZ to leak in to the calculated HTCR value. Linux will hang when
initializing KVM if HTCR's reset value has bit 2 set (sometimes the case on
A7/TC2)

Fixing T0SZ allows A7 cores to boot and T1SZ is also fixed for completeness.

Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
arch/arm/include/asm/kvm_arm.h