]> Pileus Git - ~andy/linux/commit
clk: tegra114: add LP1 suspend/resume support
authorJoseph Lo <josephl@nvidia.com>
Mon, 12 Aug 2013 09:40:02 +0000 (17:40 +0800)
committerStephen Warren <swarren@nvidia.com>
Mon, 12 Aug 2013 18:22:39 +0000 (12:22 -0600)
commit0017f447cc01fa499f1d10dec09702d381f13fe0
treee9f03dbff814dd6991b99b1c12286a7b7d10551a
parent444f9a8030ecda8dedd374fc3efed03d9f20e9cb
clk: tegra114: add LP1 suspend/resume support

When the system suspends to LP1, the CPU clock source is switched to
CLK_M (12MHz Oscillator) during suspend/resume flow. The CPU clock
source is controlled by the CCLKG_BURST_POLICY register, and hence this
register must be restored during LP1 resume.

Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
drivers/clk/tegra/clk-tegra114.c