X-Git-Url: http://pileus.org/git/?a=blobdiff_plain;f=include%2Fasm-x86_64%2Fcache.h;h=c8043a16152e31fc52d3a48c32ae94ec2155eed9;hb=dcf36bfa5de6d4e37878d4c98b6986fee4eb8b4c;hp=33e53424128b33a4096162bfe29848b2885a8b16;hpb=1f8fc99300c6247cace008c470f31eb86e9e7802;p=~andy%2Flinux

diff --git a/include/asm-x86_64/cache.h b/include/asm-x86_64/cache.h
index 33e53424128..c8043a16152 100644
--- a/include/asm-x86_64/cache.h
+++ b/include/asm-x86_64/cache.h
@@ -9,6 +9,19 @@
 /* L1 cache line size */
 #define L1_CACHE_SHIFT	(CONFIG_X86_L1_CACHE_SHIFT)
 #define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)
-#define L1_CACHE_SHIFT_MAX 7	/* largest L1 which this arch supports */
+
+#ifdef CONFIG_X86_VSMP
+
+/* vSMP Internode cacheline shift */
+#define INTERNODE_CACHE_SHIFT (12)
+#ifdef CONFIG_SMP
+#define __cacheline_aligned_in_smp					\
+       __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))         \
+       __attribute__((__section__(".data.page_aligned")))
+#endif
+
+#define __read_mostly __attribute__((__section__(".data.read_mostly")))
+
+#endif
 
 #endif