X-Git-Url: http://pileus.org/git/?a=blobdiff_plain;f=include%2Fasm-mips%2Fmsc01_ic.h;h=7989b9ffc1d26541b19b412738ed1ad0d70f3bf2;hb=eebfa976ad35b1a0debd359f1c4daed3856e21f8;hp=aa7ad9a71762e2a62ba0f44dd055f9430676bcd3;hpb=f0eef25339f92f7cd4aeea23d9ae97987a5a1e82;p=~andy%2Flinux

diff --git a/include/asm-mips/msc01_ic.h b/include/asm-mips/msc01_ic.h
index aa7ad9a7176..7989b9ffc1d 100644
--- a/include/asm-mips/msc01_ic.h
+++ b/include/asm-mips/msc01_ic.h
@@ -94,10 +94,7 @@
 /*
  * MIPS System controller interrupt register base.
  *
- * FIXME - are these macros specific to Malta and co or to the MSC?  If the
- * latter, they should be moved elsewhere.
  */
-#define MIPS_MSC01_IC_REG_BASE	0x1bc40000
 
 /*****************************************************************************
  * Absolute register addresses
@@ -144,7 +141,7 @@ typedef struct msc_irqmap {
 #define MSC01_IRQ_LEVEL		0
 #define MSC01_IRQ_EDGE		1
 
-extern void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq);
+extern void __init init_msc_irqs(unsigned long icubase, unsigned int base, msc_irqmap_t *imp, int nirq);
 extern void ll_msc_irq(void);
 
 #endif /* __ASM_MIPS_BOARDS_MSC01_IC_H */