X-Git-Url: http://pileus.org/git/?a=blobdiff_plain;f=drivers%2Fata%2Fpata_optidma.c;h=c6906b4215de266d595e175672554d81d2c870a2;hb=c7a3bd177f248d01ee18a01d22048c80e071c331;hp=800aea7b94448623a57a022b08853c27b692ada3;hpb=481ff126e8d9be63809e7854badf815e54066eed;p=~andy%2Flinux diff --git a/drivers/ata/pata_optidma.c b/drivers/ata/pata_optidma.c index 800aea7b944..c6906b4215d 100644 --- a/drivers/ata/pata_optidma.c +++ b/drivers/ata/pata_optidma.c @@ -33,7 +33,7 @@ #include #define DRV_NAME "pata_optidma" -#define DRV_VERSION "0.2.1" +#define DRV_VERSION "0.2.2" enum { READ_REG = 0, /* index of Read cycle timing register */ @@ -51,19 +51,17 @@ static int pci_clock; /* 0 = 33 1 = 25 */ * * Set up cable type and use generic probe init */ - + static int optidma_pre_reset(struct ata_port *ap) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); - static const struct pci_bits optidma_enable_bits = { + static const struct pci_bits optidma_enable_bits = { 0x40, 1, 0x08, 0x00 }; - if (ap->port_no && !pci_test_config_bits(pdev, &optidma_enable_bits)) { - ata_port_disable(ap); - printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); - return 0; - } + if (ap->port_no && !pci_test_config_bits(pdev, &optidma_enable_bits)) + return -ENOENT; + ap->cbl = ATA_CBL_PATA40; return ata_std_prereset(ap); } @@ -90,11 +88,11 @@ static void optidma_error_handler(struct ata_port *ap) * Unlock the control register block for this adapter. Registers must not * be unlocked in a situation where libata might look at them. */ - + static void optidma_unlock(struct ata_port *ap) { unsigned long regio = ap->ioaddr.cmd_addr; - + /* These 3 unlock the control register access */ inw(regio + 1); inw(regio + 1); @@ -107,11 +105,11 @@ static void optidma_unlock(struct ata_port *ap) * * Re-lock the configuration register settings. */ - + static void optidma_lock(struct ata_port *ap) { unsigned long regio = ap->ioaddr.cmd_addr; - + /* Relock */ outb(0x83, regio + 2); } @@ -154,7 +152,7 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo /* Switch from IDE to control mode */ optidma_unlock(ap); - + /* * As with many controllers the address setup time is shared @@ -166,7 +164,7 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo addr = 0; else addr = addr_timing[pci_clock][pio]; - + if (pair) { u8 pair_addr; /* Hardware constraint */ @@ -177,7 +175,7 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo if (pair_addr > addr) addr = pair_addr; } - + /* Commence primary programming sequence */ /* First we load the device number into the timing select */ outb(adev->devno, regio + MISC_REG); @@ -194,10 +192,10 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo /* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */ outb(0x85, regio + CNTRL_REG); - + /* Switch back to IDE mode */ optidma_lock(ap); - + /* Note: at this point our programming is incomplete. We are not supposed to program PCI 0x43 "things we hacked onto the chip" until we've done both sets of PIO/DMA timings */ @@ -223,7 +221,7 @@ static void optiplus_set_mode(struct ata_port *ap, struct ata_device *adev, u8 m int dev2 = 2 * adev->devno; int unit = 2 * ap->port_no + adev->devno; int udma = mode - XFER_UDMA_0; - + pci_read_config_byte(pdev, 0x44, &udcfg); if (mode <= XFER_UDMA_0) { udcfg &= ~(1 << unit); @@ -252,7 +250,7 @@ static void optiplus_set_mode(struct ata_port *ap, struct ata_device *adev, u8 m * DMA programming. The architecture of the Firestar makes it easier * for us to have a common function so we provide wrappers */ - + static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev) { optidma_set_mode(ap, adev, adev->pio_mode); @@ -267,7 +265,7 @@ static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev) * DMA programming. The architecture of the Firestar makes it easier * for us to have a common function so we provide wrappers */ - + static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev) { optidma_set_mode(ap, adev, adev->dma_mode); @@ -282,7 +280,7 @@ static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev) * DMA programming. The architecture of the Firestar makes it easier * for us to have a common function so we provide wrappers */ - + static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev) { optiplus_set_mode(ap, adev, adev->pio_mode); @@ -297,7 +295,7 @@ static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev) * DMA programming. The architecture of the Firestar makes it easier * for us to have a common function so we provide wrappers */ - + static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev) { optiplus_set_mode(ap, adev, adev->dma_mode); @@ -310,7 +308,7 @@ static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev) * Turn the ATA device setup into PCI configuration bits * for register 0x43 and return the two bits needed. */ - + static u8 optidma_make_bits43(struct ata_device *adev) { static const u8 bits43[5] = { @@ -330,17 +328,17 @@ static u8 optidma_make_bits43(struct ata_device *adev) * Finalise the configuration by writing the nibble of extra bits * of data into the chip. */ - + static void optidma_post_set_mode(struct ata_port *ap) { u8 r; int nybble = 4 * ap->port_no; struct pci_dev *pdev = to_pci_dev(ap->host->dev); - + pci_read_config_byte(pdev, 0x43, &r); - + r &= (0x0F << nybble); - r |= (optidma_make_bits43(&ap->device[0]) + + r |= (optidma_make_bits43(&ap->device[0]) + (optidma_make_bits43(&ap->device[0]) << 2)) << nybble; pci_write_config_byte(pdev, 0x43, r); @@ -388,7 +386,7 @@ static struct ata_port_operations optidma_port_ops = { .qc_prep = ata_qc_prep, .qc_issue = ata_qc_issue_prot, - .eng_timeout = ata_eng_timeout, + .data_xfer = ata_pio_data_xfer, .irq_handler = ata_interrupt, @@ -423,7 +421,7 @@ static struct ata_port_operations optiplus_port_ops = { .qc_prep = ata_qc_prep, .qc_issue = ata_qc_issue_prot, - .eng_timeout = ata_eng_timeout, + .data_xfer = ata_pio_data_xfer, .irq_handler = ata_interrupt, @@ -438,19 +436,19 @@ static struct ata_port_operations optiplus_port_ops = { * optiplus_with_udma - Look for UDMA capable setup * @pdev; ATA controller */ - + static int optiplus_with_udma(struct pci_dev *pdev) { u8 r; int ret = 0; int ioport = 0x22; struct pci_dev *dev1; - + /* Find function 1 */ dev1 = pci_get_device(0x1045, 0xC701, NULL); if(dev1 == NULL) return 0; - + /* Rev must be >= 0x10 */ pci_read_config_byte(dev1, 0x08, &r); if (r < 0x10) @@ -470,7 +468,7 @@ static int optiplus_with_udma(struct pci_dev *pdev) pci_read_config_byte(dev1, 0x52, &r); if (r & 0x80) /* IDEDIR disabled */ ret = 1; -done: +done: printk(KERN_WARNING "UDMA not supported in this configuration.\n"); done_nomsg: /* Wrong chip revision */ pci_dev_put(dev1); @@ -505,7 +503,7 @@ static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id) inw(0x1F1); inw(0x1F1); pci_clock = inb(0x1F5) & 1; /* 0 = 33Mhz, 1 = 25Mhz */ - + if (optiplus_with_udma(dev)) info = &info_82c700_udma; @@ -514,12 +512,13 @@ static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id) } static const struct pci_device_id optidma[] = { - { PCI_DEVICE(0x1045, 0xD568), }, /* Opti 82C700 */ - { 0, }, + { PCI_VDEVICE(OPTI, 0xD568), }, /* Opti 82C700 */ + + { }, }; static struct pci_driver optidma_pci_driver = { - .name = DRV_NAME, + .name = DRV_NAME, .id_table = optidma, .probe = optidma_init_one, .remove = ata_pci_remove_one @@ -530,13 +529,11 @@ static int __init optidma_init(void) return pci_register_driver(&optidma_pci_driver); } - static void __exit optidma_exit(void) { pci_unregister_driver(&optidma_pci_driver); } - MODULE_AUTHOR("Alan Cox"); MODULE_DESCRIPTION("low-level driver for Opti Firestar/Firestar Plus"); MODULE_LICENSE("GPL");