X-Git-Url: http://pileus.org/git/?a=blobdiff_plain;f=drivers%2Fata%2Fpata_hpt3x2n.c;h=765f136d8cd333fbcec4e0674ae6a4889b9a60b9;hb=72f9adfd20e3be8a33ff3ef96cec787ed97b9ba9;hp=eca68caf5f46cedece0b5127ac615f33de325808;hpb=79d8a8f736151b12129984b1250fd708440e742c;p=~andy%2Flinux diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c index eca68caf5f4..765f136d8cd 100644 --- a/drivers/ata/pata_hpt3x2n.c +++ b/drivers/ata/pata_hpt3x2n.c @@ -15,6 +15,8 @@ * Work out best PLL policy */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -25,7 +27,7 @@ #include #define DRV_NAME "pata_hpt3x2n" -#define DRV_VERSION "0.3.14" +#define DRV_VERSION "0.3.15" enum { HPT_PCI_FAST = (1 << 31), @@ -418,7 +420,7 @@ static int hpt3x2n_pci_clock(struct pci_dev *pdev) u16 sr; u32 total = 0; - pr_warning(DRV_NAME ": BIOS clock data not set.\n"); + pr_warn("BIOS clock data not set\n"); /* This is the process the HPT371 BIOS is reported to use */ for (i = 0; i < 128; i++) { @@ -528,8 +530,7 @@ hpt372n: ppi[0] = &info_hpt372n; break; default: - pr_err(DRV_NAME ": PCI table is bogus, please report (%d).\n", - dev->device); + pr_err("PCI table is bogus, please report (%d)\n", dev->device); return -ENODEV; } @@ -578,11 +579,11 @@ hpt372n: pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low); } if (adjust == 8) { - pr_err(DRV_NAME ": DPLL did not stabilize!\n"); + pr_err("DPLL did not stabilize!\n"); return -ENODEV; } - pr_info(DRV_NAME ": bus clock %dMHz, using 66MHz DPLL.\n", pci_mhz); + pr_info("bus clock %dMHz, using 66MHz DPLL\n", pci_mhz); /* * Set our private data up. We only need a few flags