X-Git-Url: http://pileus.org/git/?a=blobdiff_plain;f=arch%2Fsh%2Finclude%2Fcpu-sh4%2Fcpu%2Fcache.h;h=92c4cd119b662f99dc4ed9d0f5d1b54dea3001a9;hb=8ab47d3ec77d94ad9a6bb01efd696e1e34cfe80d;hp=7bfb9e8b069c22d789318085e866440502f0c755;hpb=bbb20089a3275a19e475dbc21320c3742e3ca423;p=~andy%2Flinux

diff --git a/arch/sh/include/cpu-sh4/cpu/cache.h b/arch/sh/include/cpu-sh4/cpu/cache.h
index 7bfb9e8b069..92c4cd119b6 100644
--- a/arch/sh/include/cpu-sh4/cpu/cache.h
+++ b/arch/sh/include/cpu-sh4/cpu/cache.h
@@ -17,7 +17,7 @@
 #define SH_CACHE_COMBINED	4
 #define SH_CACHE_ASSOC		8
 
-#define CCR		0xff00001c	/* Address of Cache Control Register */
+#define SH_CCR		0xff00001c	/* Address of Cache Control Register */
 #define CCR_CACHE_OCE	0x0001	/* Operand Cache Enable */
 #define CCR_CACHE_WT	0x0002	/* Write-Through (for P0,U0,P3) (else writeback)*/
 #define CCR_CACHE_CB	0x0004	/* Copy-Back (for P1) (else writethrough) */