X-Git-Url: http://pileus.org/git/?a=blobdiff_plain;f=arch%2Farm%2Fmach-exynos%2Fplatsmp.c;h=95e04bd5813fad587591d4fe25bf41800f087d96;hb=86652188f345edec56b0074a65f6db17f16eb359;hp=60f7c5be057d3c2440f7613b4ccdecd897753249;hpb=3792a64fdeeb9cab56c22695aaeb0624f1b295b4;p=~andy%2Flinux

diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 60f7c5be057..95e04bd5813 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -20,7 +20,6 @@
 #include <linux/jiffies.h>
 #include <linux/smp.h>
 #include <linux/io.h>
-#include <linux/irqchip/arm-gic.h>
 
 #include <asm/cacheflush.h>
 #include <asm/smp_plat.h>
@@ -75,13 +74,6 @@ static DEFINE_SPINLOCK(boot_lock);
 
 static void __cpuinit exynos_secondary_init(unsigned int cpu)
 {
-	/*
-	 * if any interrupts are already enabled for the primary
-	 * core (e.g. timer irq), then they will not have been enabled
-	 * for us: do so
-	 */
-	gic_secondary_init(0);
-
 	/*
 	 * let the primary processor know we're out of the
 	 * pen, then head off into the C entry point