X-Git-Url: http://pileus.org/git/?a=blobdiff_plain;f=Documentation%2Fpowerpc%2Fmpc52xx-device-tree-bindings.txt;h=6f12f1c79c0c82f4a93ffde90da6b96bd62485f9;hb=cd764695b67386a81964f68e9c66efd9f13f4d29;hp=5e03610e186f986c5cc3a21a5e4f9bbac3ee4332;hpb=f09cc910fe3af7e63298105bc0482653eb534c3c;p=~andy%2Flinux diff --git a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt index 5e03610e186..6f12f1c79c0 100644 --- a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt +++ b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt @@ -186,6 +186,12 @@ Recommended soc5200 child nodes; populate as needed for your board name device_type compatible Description ---- ----------- ---------- ----------- gpt@ gpt fsl,mpc5200-gpt General purpose timers +gpt@ gpt fsl,mpc5200-gpt-gpio General purpose + timers in GPIO mode +gpio@ fsl,mpc5200-gpio MPC5200 simple gpio + controller +gpio@ fsl,mpc5200-gpio-wkup MPC5200 wakeup gpio + controller rtc@ rtc mpc5200-rtc Real time clock mscan@ mscan mpc5200-mscan CAN bus controller pci@ pci mpc5200-pci PCI bridge @@ -225,6 +231,23 @@ PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the compatible field. +7) GPIO controller nodes +Each GPIO controller node should have the empty property gpio-controller and +#gpio-cells set to 2. First cell is the GPIO number which is interpreted +according to the bit numbers in the GPIO control registers. The second cell +is for flags which is currently unsused. + +8) FEC nodes +The FEC node can specify one of the following properties to configure +the MII link: +"fsl,7-wire-mode" - An empty property that specifies the link uses 7-wire + mode instead of MII +"current-speed" - Specifies that the MII should be configured for a fixed + speed. This property should contain two cells. The + first cell specifies the speed in Mbps and the second + should be '0' for half duplex and '1' for full duplex +"phy-handle" - Contains a phandle to an Ethernet PHY. + IV - Extra Notes ================