Merge tag 'kvm-3.10-2' of git://git.kernel.org/pub/scm/virt/kvm/kvm

[~andy/linux] / sound / soc / davinci / davinci-mcasp.c

diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index aeb3a6627d6a9b3546a33573c88f30e53c05fb1f..56ecfc72f2e9500ebda81214d972b65f291cd518 100644 (file)
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -505,7 +505,10 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
                mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
                mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE);
 
-               mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, ACLKX | AFSX);
+               mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG,
+                               ACLKX | ACLKR);
+               mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG,
+                               AFSX | AFSR);
                break;
        case SND_SOC_DAIFMT_CBM_CFS:
                /* codec is clock master and frame slave */
@@ -565,7 +568,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
                mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
                mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
 
-               mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
+               mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
                mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
                break;
 
@@ -636,11 +639,12 @@ static int davinci_config_channel_size(struct davinci_audio_dev *dev,
         * callback, take it into account here. That allows us to for example
         * send 32 bits per channel to the codec, while only 16 of them carry
         * audio payload.
-        * The clock ratio is given for a full period of data (both left and
-        * right channels), so it has to be divided by 2.
+        * The clock ratio is given for a full period of data (for I2S format
+        * both left and right channels), so it has to be divided by number of
+        * tdm-slots (for I2S - divided by 2).
         */
        if (dev->bclk_lrclk_ratio)
-               word_length = dev->bclk_lrclk_ratio / 2;
+               word_length = dev->bclk_lrclk_ratio / dev->tdm_slots;
 
        /* mapping of the XSSZ bit-field as described in the datasheet */
        fmt = (word_length >> 1) - 1;
@@ -834,17 +838,20 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
        int word_length;
        u8 fifo_level;
        u8 slots = dev->tdm_slots;
+       u8 active_serializers;
        int channels;
        struct snd_interval *pcm_channels = hw_param_interval(params,
                                        SNDRV_PCM_HW_PARAM_CHANNELS);
        channels = pcm_channels->min;
 
+       active_serializers = (channels + slots - 1) / slots;
+
        if (davinci_hw_common_param(dev, substream->stream, channels) == -EINVAL)
                return -EINVAL;
        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
-               fifo_level = dev->txnumevt;
+               fifo_level = dev->txnumevt * active_serializers;
        else
-               fifo_level = dev->rxnumevt;
+               fifo_level = dev->rxnumevt * active_serializers;
 
        if (dev->op_mode == DAVINCI_MCASP_DIT_MODE)
                davinci_hw_dit_param(dev);
@@ -889,7 +896,6 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
                dma_params->acnt = dma_params->data_type;
 
        dma_params->fifo_level = fifo_level;
-       dma_params->active_serializers = (channels + slots - 1) / slots;
        davinci_config_channel_size(dev, word_length);
 
        return 0;