]> Pileus Git - ~andy/linux/blobdiff - sound/soc/codecs/arizona.c
Merge tag 'v3.13-rc1' into asoc-arizona
[~andy/linux] / sound / soc / codecs / arizona.c
index 708326265a37da977163a8827ad1b48b2304bd06..eb9f5d4d8928aee386cebfb0fbeddd0ed74654bc 100644 (file)
@@ -292,6 +292,10 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
        "AIF1RX8",
        "AIF2RX1",
        "AIF2RX2",
+       "AIF2RX3",
+       "AIF2RX4",
+       "AIF2RX5",
+       "AIF2RX6",
        "AIF3RX1",
        "AIF3RX2",
        "SLIMRX1",
@@ -395,6 +399,10 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = {
        0x27,
        0x28,  /* AIF2RX1 */
        0x29,
+       0x2a,
+       0x2b,
+       0x2c,
+       0x2d,
        0x30,  /* AIF3RX1 */
        0x31,
        0x38,  /* SLIMRX1 */
@@ -1487,21 +1495,25 @@ static void arizona_enable_fll(struct arizona_fll *fll,
 {
        struct arizona *arizona = fll->arizona;
        int ret;
+       bool use_sync = false;
 
        /*
         * If we have both REFCLK and SYNCCLK then enable both,
         * otherwise apply the SYNCCLK settings to REFCLK.
         */
-       if (fll->ref_src >= 0 && fll->ref_src != fll->sync_src) {
+       if (fll->ref_src >= 0 && fll->ref_freq &&
+           fll->ref_src != fll->sync_src) {
                regmap_update_bits(arizona->regmap, fll->base + 5,
                                   ARIZONA_FLL1_OUTDIV_MASK,
                                   ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
 
                arizona_apply_fll(arizona, fll->base, ref, fll->ref_src,
                                  false);
-               if (fll->sync_src >= 0)
+               if (fll->sync_src >= 0) {
                        arizona_apply_fll(arizona, fll->base + 0x10, sync,
                                          fll->sync_src, true);
+                       use_sync = true;
+               }
        } else if (fll->sync_src >= 0) {
                regmap_update_bits(arizona->regmap, fll->base + 5,
                                   ARIZONA_FLL1_OUTDIV_MASK,
@@ -1521,7 +1533,7 @@ static void arizona_enable_fll(struct arizona_fll *fll,
         * Increase the bandwidth if we're not using a low frequency
         * sync source.
         */
-       if (fll->sync_src >= 0 && fll->sync_freq > 100000)
+       if (use_sync && fll->sync_freq > 100000)
                regmap_update_bits(arizona->regmap, fll->base + 0x17,
                                   ARIZONA_FLL1_SYNC_BW, 0);
        else
@@ -1534,10 +1546,11 @@ static void arizona_enable_fll(struct arizona_fll *fll,
        /* Clear any pending completions */
        try_wait_for_completion(&fll->ok);
 
+       regmap_update_bits(arizona->regmap, fll->base + 1,
+                          ARIZONA_FLL1_FREERUN, 0);
        regmap_update_bits(arizona->regmap, fll->base + 1,
                           ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
-       if (fll->ref_src >= 0 && fll->sync_src >= 0 &&
-           fll->ref_src != fll->sync_src)
+       if (use_sync)
                regmap_update_bits(arizona->regmap, fll->base + 0x11,
                                   ARIZONA_FLL1_SYNC_ENA,
                                   ARIZONA_FLL1_SYNC_ENA);
@@ -1553,6 +1566,8 @@ static void arizona_disable_fll(struct arizona_fll *fll)
        struct arizona *arizona = fll->arizona;
        bool change;
 
+       regmap_update_bits(arizona->regmap, fll->base + 1,
+                          ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
        regmap_update_bits_check(arizona->regmap, fll->base + 1,
                                 ARIZONA_FLL1_ENA, 0, &change);
        regmap_update_bits(arizona->regmap, fll->base + 0x11,
@@ -1571,10 +1586,12 @@ int arizona_set_fll_refclk(struct arizona_fll *fll, int source,
        if (fll->ref_src == source && fll->ref_freq == Fref)
                return 0;
 
-       if (fll->fout && Fref > 0) {
-               ret = arizona_calc_fll(fll, &ref, Fref, fll->fout);
-               if (ret != 0)
-                       return ret;
+       if (fll->fout) {
+               if (Fref > 0) {
+                       ret = arizona_calc_fll(fll, &ref, Fref, fll->fout);
+                       if (ret != 0)
+                               return ret;
+               }
 
                if (fll->sync_src >= 0) {
                        ret = arizona_calc_fll(fll, &sync, fll->sync_freq,