Merge branch 'x86-setup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...

[~andy/linux] / sound / pci / echoaudio / echoaudio_dsp.h

diff --git a/sound/pci/echoaudio/echoaudio_dsp.h b/sound/pci/echoaudio/echoaudio_dsp.h
index e55ee00991ac1d73855800de1e21d5545e923592..cb7d75a0a50349eeb745d3f97f2f497cac24a149 100644 (file)
--- a/sound/pci/echoaudio/echoaudio_dsp.h
+++ b/sound/pci/echoaudio/echoaudio_dsp.h
@@ -576,8 +576,13 @@ SET_LAYLA24_FREQUENCY_REG command.
 #define E3G_ASIC_NOT_LOADED            0xffff
 #define E3G_BOX_TYPE_MASK              0xf0
 
-#define EXT_3GBOX_NC                   0x01
-#define EXT_3GBOX_NOT_SET              0x02
+/* Indigo express control register values */
+#define INDIGO_EXPRESS_32000           0x02
+#define INDIGO_EXPRESS_44100           0x01
+#define INDIGO_EXPRESS_48000           0x00
+#define INDIGO_EXPRESS_DOUBLE_SPEED    0x10
+#define INDIGO_EXPRESS_QUAD_SPEED      0x04
+#define INDIGO_EXPRESS_CLOCK_MASK      0x17
 
 
 /*
@@ -642,18 +647,18 @@ struct comm_page {                /*                              Base    Length*/
        u32 flags;              /* See Appendix A below         0x004   4 */
        u32 unused;             /* Unused entry                 0x008   4 */
        u32 sample_rate;        /* Card sample rate in Hz       0x00c   4 */
-       volatile u32 handshake; /* DSP command handshake        0x010   4 */
+       u32 handshake;          /* DSP command handshake        0x010   4 */
        u32 cmd_start;          /* Chs. to start mask           0x014   4 */
        u32 cmd_stop;           /* Chs. to stop mask            0x018   4 */
        u32 cmd_reset;          /* Chs. to reset mask           0x01c   4 */
        u16 audio_format[DSP_MAXPIPES]; /* Chs. audio format    0x020   32*2 */
        struct sg_entry sglist_addr[DSP_MAXPIPES];
                                /* Chs. Physical sglist addrs   0x060   32*8 */
-       volatile u32 position[DSP_MAXPIPES];
+       u32 position[DSP_MAXPIPES];
                                /* Positions for ea. ch.        0x160   32*4 */
-       volatile s8 vu_meter[DSP_MAXPIPES];
+       s8 vu_meter[DSP_MAXPIPES];
                                /* VU meters                    0x1e0   32*1 */
-       volatile s8 peak_meter[DSP_MAXPIPES];
+       s8 peak_meter[DSP_MAXPIPES];
                                /* Peak meters                  0x200   32*1 */
        s8 line_out_level[DSP_MAXAUDIOOUTPUTS];
                                /* Output gain                  0x220   16*1 */
@@ -665,7 +670,7 @@ struct comm_page {          /*                              Base    Length*/
                        /* Gina/Darla play filters - obsolete   0x3c0   168*4 */
        u32 rec_coeff[MAX_REC_TAPS];
                        /* Gina/Darla record filters - obsolete 0x660   192*4 */
-       volatile u16 midi_input[MIDI_IN_BUFFER_SIZE];
+       u16 midi_input[MIDI_IN_BUFFER_SIZE];
                        /* MIDI input data transfer buffer      0x960   256*2 */
        u8 gd_clock_state;      /* Chg Gina/Darla clock state   0xb60   1 */
        u8 gd_spdif_status;     /* Chg. Gina/Darla S/PDIF state 0xb61   1 */
@@ -674,11 +679,10 @@ struct comm_page {                /*                              Base    Length*/
        u32 nominal_level_mask; /* -10 level enable mask        0xb64   4 */
        u16 input_clock;        /* Chg. Input clock state       0xb68   2 */
        u16 output_clock;       /* Chg. Output clock state      0xb6a   2 */
-       volatile u32 status_clocks;
-                               /* Current Input clock state    0xb6c   4 */
+       u32 status_clocks;      /* Current Input clock state    0xb6c   4 */
        u32 ext_box_status;     /* External box status          0xb70   4 */
        u32 cmd_add_buffer;     /* Pipes to add (obsolete)      0xb74   4 */
-       volatile u32 midi_out_free_count;
+       u32 midi_out_free_count;
                        /* # of bytes free in MIDI output FIFO  0xb78   4 */
        u32 unused2;            /* Cyclic pipes                 0xb7c   4 */
        u32 control_register;