edac: move dimm properties to struct dimm_info

[~andy/linux] / include / linux / edac.h

diff --git a/include/linux/edac.h b/include/linux/edac.h
index c621d762bb2c9d18fd4ccda585c78491cafb1730..87aa07d2ee2852b8d1e21153728039354089d70e 100644 (file)
--- a/include/linux/edac.h
+++ b/include/linux/edac.h
@@ -312,39 +312,55 @@ enum scrub_type {
  * PS - I enjoyed writing all that about as much as you enjoyed reading it.
  */
 
+/* FIXME: add a per-dimm ce error count */
+struct dimm_info {
+       char label[EDAC_MC_LABEL_LEN + 1];      /* DIMM label on motherboard */
+       unsigned memory_controller;
+       unsigned csrow;
+       unsigned csrow_channel;
+
+       u32 grain;              /* granularity of reported error in bytes */
+       enum dev_type dtype;    /* memory device type */
+       enum mem_type mtype;    /* memory dimm type */
+       enum edac_type edac_mode;       /* EDAC mode for this dimm */
+
+       u32 ce_count;           /* Correctable Errors for this dimm */
+};
+
 /**
  * struct rank_info - contains the information for one DIMM rank
  *
  * @chan_idx:  channel number where the rank is (typically, 0 or 1)
  * @ce_count:  number of correctable errors for this rank
- * @label:     DIMM label. Different ranks for the same DIMM should be
- *             filled, on userspace, with the same label.
- *             FIXME: The core currently won't enforce it.
  * @csrow:     A pointer to the chip select row structure (the parent
  *             structure). The location of the rank is given by
  *             the (csrow->csrow_idx, chan_idx) vector.
+ * @dimm:      A pointer to the DIMM structure, where the DIMM label
+ *             information is stored.
+ *
+ * FIXME: Currently, the EDAC core model will assume one DIMM per rank.
+ *       This is a bad assumption, but it makes this patch easier. Later
+ *       patches in this series will fix this issue.
  */
 struct rank_info {
        int chan_idx;
        u32 ce_count;
-       char label[EDAC_MC_LABEL_LEN + 1];
-       struct csrow_info *csrow;       /* the parent */
+       struct csrow_info *csrow;
+       struct dimm_info *dimm;
 };
 
 struct csrow_info {
-       unsigned long first_page;       /* first page number in dimm */
-       unsigned long last_page;        /* last page number in dimm */
+       unsigned long first_page;       /* first page number in csrow */
+       unsigned long last_page;        /* last page number in csrow */
+       u32 nr_pages;                   /* number of pages in csrow */
        unsigned long page_mask;        /* used for interleaving -
                                         * 0UL for non intlv
                                         */
-       u32 nr_pages;           /* number of pages in csrow */
-       u32 grain;              /* granularity of reported error in bytes */
-       int csrow_idx;          /* the chip-select row */
-       enum dev_type dtype;    /* memory device type */
+       int csrow_idx;                  /* the chip-select row */
+
        u32 ue_count;           /* Uncorrectable Errors for this csrow */
        u32 ce_count;           /* Correctable Errors for this csrow */
-       enum mem_type mtype;    /* memory csrow type */
-       enum edac_type edac_mode;       /* EDAC mode for this csrow */
+
        struct mem_ctl_info *mci;       /* the parent */
 
        struct kobject kobj;    /* sysfs kobject for this csrow */
@@ -428,6 +444,13 @@ struct mem_ctl_info {
        int mc_idx;
        int nr_csrows;
        struct csrow_info *csrows;
+
+       /*
+        * DIMM info. Will eventually remove the entire csrows_info some day
+        */
+       unsigned nr_dimms;
+       struct dimm_info *dimms;
+
        /*
         * FIXME - what about controllers on other busses? - IDs must be
         * unique.  dev pointer should be sufficiently unique, but