]> Pileus Git - ~andy/linux/blobdiff - include/asm-sparc64/cpudata.h
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[~andy/linux] / include / asm-sparc64 / cpudata.h
index 7f0a74ec47f6ed1bcaae66fa9fb276e588484ae3..f2cc9411b4c749ca83c6f0f18cd2c990e5d89058 100644 (file)
@@ -19,7 +19,7 @@ typedef struct {
        unsigned int    __softirq_pending; /* must be 1st, see rtrap.S */
        unsigned int    multiplier;
        unsigned int    counter;
-       unsigned int    idle_volume;
+       unsigned int    __pad1;
        unsigned long   clock_tick;     /* %tick's per second */
        unsigned long   udelay_val;
 
@@ -65,14 +65,24 @@ struct trap_per_cpu {
        unsigned long           nonresum_mondo_pa;
        unsigned long           nonresum_kernel_buf_pa;
 
-/* Dcache lines 3 and 4: Hypervisor Fault Status */
+/* Dcache lines 3, 4, 5, and 6: Hypervisor Fault Status */
        struct hv_fault_status  fault_info;
+
+/* Dcache line 7: Physical addresses of CPU send mondo block and CPU list.  */
+       unsigned long           cpu_mondo_block_pa;
+       unsigned long           cpu_list_pa;
+       unsigned long           tsb_huge;
+       unsigned long           tsb_huge_temp;
+
+/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size.  */
+       unsigned int            irq_worklist;
+       unsigned int            __pad1;
+       unsigned long           __pad2[3];
 } __attribute__((aligned(64)));
 extern struct trap_per_cpu trap_block[NR_CPUS];
-extern void init_cur_cpu_trap(void);
+extern void init_cur_cpu_trap(struct thread_info *);
 extern void setup_tba(void);
 
-#ifdef CONFIG_SMP
 struct cpuid_patch_entry {
        unsigned int    addr;
        unsigned int    cheetah_safari[4];
@@ -81,7 +91,6 @@ struct cpuid_patch_entry {
        unsigned int    sun4v[4];
 };
 extern struct cpuid_patch_entry __cpuid_patch, __cpuid_patch_end;
-#endif
 
 struct sun4v_1insn_patch_entry {
        unsigned int    addr;
@@ -108,13 +117,16 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
 #define TRAP_PER_CPU_NONRESUM_MONDO_PA 0x30
 #define TRAP_PER_CPU_NONRESUM_KBUF_PA  0x38
 #define TRAP_PER_CPU_FAULT_INFO                0x40
+#define TRAP_PER_CPU_CPU_MONDO_BLOCK_PA        0xc0
+#define TRAP_PER_CPU_CPU_LIST_PA       0xc8
+#define TRAP_PER_CPU_TSB_HUGE          0xd0
+#define TRAP_PER_CPU_TSB_HUGE_TEMP     0xd8
+#define TRAP_PER_CPU_IRQ_WORKLIST      0xe0
 
-#define TRAP_BLOCK_SZ_SHIFT            7
+#define TRAP_BLOCK_SZ_SHIFT            8
 
 #include <asm/scratchpad.h>
 
-#ifdef CONFIG_SMP
-
 #define __GET_CPUID(REG)                               \
        /* Spitfire implementation (default). */        \
 661:   ldxa            [%g0] ASI_UPA_CONFIG, REG;      \
@@ -146,30 +158,29 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
        nop;                                            \
        .previous;
 
-/* Clobbers TMP, current address space PGD phys address into DEST.  */
-#define TRAP_LOAD_PGD_PHYS(DEST, TMP)          \
+#ifdef CONFIG_SMP
+
+#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP)                \
        __GET_CPUID(TMP)                        \
        sethi   %hi(trap_block), DEST;          \
        sllx    TMP, TRAP_BLOCK_SZ_SHIFT, TMP;  \
        or      DEST, %lo(trap_block), DEST;    \
        add     DEST, TMP, DEST;                \
+
+/* Clobbers TMP, current address space PGD phys address into DEST.  */
+#define TRAP_LOAD_PGD_PHYS(DEST, TMP)          \
+       TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
        ldx     [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
 
 /* Clobbers TMP, loads local processor's IRQ work area into DEST.  */
 #define TRAP_LOAD_IRQ_WORK(DEST, TMP)          \
-       __GET_CPUID(TMP)                        \
-       sethi   %hi(__irq_work), DEST;          \
-       sllx    TMP, 6, TMP;                    \
-       or      DEST, %lo(__irq_work), DEST;    \
-       add     DEST, TMP, DEST;
+       TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+       add     DEST, TRAP_PER_CPU_IRQ_WORKLIST, DEST;
 
 /* Clobbers TMP, loads DEST with current thread info pointer.  */
 #define TRAP_LOAD_THREAD_REG(DEST, TMP)                \
-       __GET_CPUID(TMP)                        \
-       sethi   %hi(trap_block), DEST;          \
-       sllx    TMP, TRAP_BLOCK_SZ_SHIFT, TMP;  \
-       or      DEST, %lo(trap_block), DEST;    \
-       ldx     [DEST + TMP], DEST;
+       TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+       ldx     [DEST + TRAP_PER_CPU_THREAD], DEST;
 
 /* Given the current thread info pointer in THR, load the per-cpu
  * area base of the current processor into DEST.  REG1, REG2, and REG3 are
@@ -191,22 +202,23 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
 
 #else
 
-#define __GET_CPUID(REG)                               \
-       mov     0, REG;
+#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP)                \
+       sethi   %hi(trap_block), DEST;          \
+       or      DEST, %lo(trap_block), DEST;    \
 
 /* Uniprocessor versions, we know the cpuid is zero.  */
 #define TRAP_LOAD_PGD_PHYS(DEST, TMP)          \
-       sethi   %hi(trap_block), DEST;          \
-       or      DEST, %lo(trap_block), DEST;    \
+       TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
        ldx     [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
 
+/* Clobbers TMP, loads local processor's IRQ work area into DEST.  */
 #define TRAP_LOAD_IRQ_WORK(DEST, TMP)          \
-       sethi   %hi(__irq_work), DEST;          \
-       or      DEST, %lo(__irq_work), DEST;
+       TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+       add     DEST, TRAP_PER_CPU_IRQ_WORKLIST, DEST;
 
 #define TRAP_LOAD_THREAD_REG(DEST, TMP)                \
-       sethi   %hi(trap_block), DEST;          \
-       ldx     [DEST + %lo(trap_block)], DEST;
+       TRAP_LOAD_TRAP_BLOCK(DEST, TMP)         \
+       ldx     [DEST + TRAP_PER_CPU_THREAD], DEST;
 
 /* No per-cpu areas on uniprocessor, so no need to load DEST.  */
 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3)