Merge branch 'avr32-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemo...

[~andy/linux] / include / asm-powerpc / spu.h

diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 816e3dc1f66f40478d760b9ca0d232011889712d..e3c845b0f76438af611c8450c36e4660b076207b 100644 (file)
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -98,9 +98,8 @@
 #define MFC_PRIV_ATTN_EVENT                 0x00000800
 #define MFC_MULTI_SRC_EVENT                 0x00001000
 
-/* Flags indicating progress during context switch. */
+/* Flag indicating progress during context switch. */
 #define SPU_CONTEXT_SWITCH_PENDING     0UL
-#define SPU_CONTEXT_SWITCH_ACTIVE      1UL
 
 struct spu_context;
 struct spu_runqueue;
@@ -146,7 +145,6 @@ struct spu {
        void (* ibox_callback)(struct spu *spu);
        void (* stop_callback)(struct spu *spu);
        void (* mfc_callback)(struct spu *spu);
-       void (* dma_callback)(struct spu *spu, int type);
 
        char irq_c0[8];
        char irq_c1[8];
@@ -197,8 +195,6 @@ struct cbe_spu_info {
 extern struct cbe_spu_info cbe_spu_info[];
 
 void spu_init_channels(struct spu *spu);
-int spu_irq_class_0_bottom(struct spu *spu);
-int spu_irq_class_1_bottom(struct spu *spu);
 void spu_irq_setaffinity(struct spu *spu, int cpu);
 
 void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
@@ -251,6 +247,7 @@ struct spufs_calls {
                                                __u32 __user *ustatus);
        int (*coredump_extra_notes_size)(void);
        int (*coredump_extra_notes_write)(struct file *file, loff_t *foffset);
+       void (*notify_spus_active)(void);
        struct module *owner;
 };
 
@@ -305,6 +302,9 @@ struct notifier_block;
 int spu_switch_event_register(struct notifier_block * n);
 int spu_switch_event_unregister(struct notifier_block * n);
 
+extern void notify_spus_active(void);
+extern void do_notify_spus_active(void);
+
 /*
  * This defines the Local Store, Problem Area and Privilege Area of an SPU.
  */
@@ -538,11 +538,13 @@ struct spu_priv1 {
 #define CLASS1_STORAGE_FAULT_INTR                      0x2L
 #define CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR          0x4L
 #define CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR          0x8L
+#define CLASS1_INTR_MASK                               0xfL
 #define CLASS2_MAILBOX_INTR                            0x1L
 #define CLASS2_SPU_STOP_INTR                           0x2L
 #define CLASS2_SPU_HALT_INTR                           0x4L
 #define CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR         0x8L
 #define CLASS2_MAILBOX_THRESHOLD_INTR                  0x10L
+#define CLASS2_INTR_MASK                               0x1fL
        u8  pad_0x158_0x180[0x28];                              /* 0x158 */
        u64 int_route_RW;                                       /* 0x180 */